PIC16F684-ISL

Manufacturer Part NumberPIC16F684-ISL
ManufacturerMicrochip Technology Inc.
PIC16F684-ISL datasheets
 


Specifications of PIC16F684-ISL

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PIC16F684
2.2.2.6
PCON Register
The Power Control (PCON) register (see Table 12-2)
contains flag bits to differentiate between a:
• Power-on Reset (POR)
• Brown-out Detect (BOD)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the ultra low-power
wake-up and software enable of the BOD.
The PCON register bits are shown in Register 2-6.
REGISTER 2-6:
PCON – POWER CONTROL REGISTER (ADDRESS: 8Eh)
U-0
bit 7
bit 7-6
Unimplemented: Read as ‘0’
bit 5
ULPWUE: Ultra Low-Power Wake-up Enable bit
1 = Ultra low-power wake-up enabled
0 = Ultra low-power wake-up disabled
bit 4
SBODEN: Software BOD Enable bit
1 = BOD enabled
0 = BOD disabled
bit 3-2
Unimplemented: Read as ‘0’
bit 1
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOD: Brown-out Detect Status bit
1 = No Brown-out Detect occurred
0 = A Brown-out Detect occurred (must be set in software after a Brown-out Detect occurs)
Note 1: BODEN<1:0> = 01 in the Configuration Word register for this bit to control the BOD.
Legend:
R = Readable bit
-n = Value at POR
DS41202C-page 16
U-0
R/W-0
R/W-1
U-0
ULPWUE SBODEN
(1)
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
Preliminary
U-0
R/W-0
R/W-x
POR
BOD
bit 0
x = Bit is unknown
 2004 Microchip Technology Inc.