PIC16F684-ISL

Manufacturer Part NumberPIC16F684-ISL
ManufacturerMicrochip Technology Inc.
PIC16F684-ISL datasheets
 

Specifications of PIC16F684-ISL

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PIC16F684
9.2
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy, the
charge holding capacitor (C
) must be allowed to
HOLD
fully charge to the input channel voltage level. The ana-
log input model is shown in Figure 9-4. The source
impedance (R
) and the internal sampling switch (R
S
impedance directly affect the time required to charge
the capacitor C
. The sampling switch (R
HOLD
ance varies over the device voltage (V
Figure 9-4. The maximum recommended impedance
for analog sources is 10 k . As the impedance is
decreased, the acquisition time may be decreased.
EQUATION 9-1:
ACQUISITION TIME
T
= Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
ACQ
= T
+ T
+ T
AMP
C
COFF
= 2 s + T
+ [(Temperature -25°C)(0.05 s/°C)]
C
T
= C
(R
+ R
+ R
) In(1/2047)
C
HOLD
IC
SS
S
= -120 pF (1 k
k
k ) In(0.0004885)
= 16.47 s
T
= 2 s + 16.47 s + [(50°C-25°C)(0.05 s/°C)]
ACQ
= 19.72 s
Note 1: The reference voltage (V
REF
2: The charge holding capacitor (C
3: The maximum recommended impedance for analog sources is 10 k . This is required to meet the pin
leakage specification.
FIGURE 9-4:
ANALOG INPUT MODEL
ANx
R
S
C
PIN
VA
5 pF
Legend: C
= Input Capacitance
PIN
V
= Threshold Voltage
T
I
= Leakage Current at the pin due to
LEAKAGE
various junctions
R
= Interconnect Resistance
IC
SS
= Sampling Switch
C
= Sample/Hold Capacitance (from DAC)
HOLD
DS41202C-page 68
After the analog input channel is selected (changed),
this acquisition must be done before the conversion can
be started.
To calculate the minimum acquisition time, Equation 9-1
may be used. This equation assumes that 1/2 LSb error is
used (1024 steps for the A/D). The 1/2 LSb error is the
)
SS
maximum error allowed for the A/D to meet its specified
resolution.
) imped-
SS
), see
To calculate the minimum acquisition time, T
DD
the “PICmicro
®
Manual” (DS33023).
) has no effect on the equation, since it cancels itself out.
) is not discharged after each conversion.
HOLD
V
DD
Sampling
Switch
V
= 0.6V
T
SS R
R
1k
IC
I
LEAKAGE
V
= 0.6V
T
± 500 nA
6V
5V
V
4V
DD
3V
2V
Preliminary
, see
ACQ
Mid-Range MCU Family Reference
SS
C
HOLD
= DAC capacitance
= 120 pF
V
SS
5 6 7 8 9 10 11
Sampling Switch
(k )
 2004 Microchip Technology Inc.