74ACT843SC Fairchild Semiconductor, 74ACT843SC Datasheet - Page 2

IC LATCH TRANSPARENT 9BIT 24SOIC

74ACT843SC

Manufacturer Part Number
74ACT843SC
Description
IC LATCH TRANSPARENT 9BIT 24SOIC
Manufacturer
Fairchild Semiconductor
Series
74ACTr
Datasheets

Specifications of 74ACT843SC

Logic Type
D-Type Transparent Latch
Circuit
9:9
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
5.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
Functional Description
The ACT843 consists of nine D-type latches with 3-STATE
outputs. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. This allows asynchronous
operation, as the output transition follows the data in transi-
tion. On the LE HIGH-to-LOW transition, the data that
meets the setup times is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH,
the bus output is in the high impedance state. In addition to
Function Tables
H
L
X
Z
NC
Logic Diagram
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
No Change
CLR
H
H
H
H
H
H
H
H
L
L
L
PRE
H
H
H
H
H
H
H
H
L
L
L
Inputs
OE
H
H
H
H
H
L
L
L
L
L
L
LE
H
H
H
H
X
X
X
L
L
L
L
D
H
X
H
X
X
X
X
X
X
L
L
Internal
2
NC
NC
Q
H
H
H
H
H
L
L
L
L
the LE and OE pins, the ACT843 has a Clear (CLR) pin
and a Preset (PRE) pin. These pins are ideal for parity bus
interfacing in high performance systems. When CLR is
LOW, the outputs are LOW if OE is LOW. When CLR is
HIGH, data can be entered into the latch. When PRE is
LOW, the outputs are HIGH if OE is LOW. Preset overrides
CLR.
Outputs
NC
H
H
Z
Z
Z
L
L
Z
Z
O
H
High Z
High Z
Latched
Transparent
Transparent
Latched
Preset
Clear
Preset
Clear/High Z
Preset/High Z
Function

Related parts for 74ACT843SC