AS4C256K16E0-35JC Alliance Semiconductor, AS4C256K16E0-35JC Datasheet
AS4C256K16E0-35JC
Manufacturer Part Number
AS4C256K16E0-35JC
Description
Manufacturer
Alliance Semiconductor
Datasheet
1.AS4C256K16E0-35JC.pdf
(24 pages)
Specifications of AS4C256K16E0-35JC
Case
SOJ-40
Date_code
1999+
Features
• Organization: 262,144 words × 16 bits
• High speed
• Low power consumption
• EDO page mode
Pin arrangement
Selection guide
Shaded areas contain advance information.
Maximum
Maximum column address access time
Maximum
Maximum output enable (
Minimum read or write cycle time
Minimum EDO page mode cycle time
Maximum operating current
Maximum CMOS standby current
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
- Active:
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
4/11/01; v.1.1
RAS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
Vcc
Vcc
Vcc
WE
NC
NC
NC
A0
A1
A2
A3
RAS
CAS
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
500 mW max (AS4C256K16E0-25)
access time
access time
SOJ
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
OE
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
) access time
RAS
V
I/O0
I/O1
I/O2
I/O3
V
I/O4
I/O5
I/O6
I/O7
V
WE
NC
NC
NC
A0
A1
A2
A3
CC
CC
CC
1
2
3
4
5
6
7
8
9
10
13
14
15
16
17
18
19
20
21
22
5V 256K×16 CMOS DRAM (EDO)
Symbol
TSOP II
t
t
t
t
I
I
Alliance Semiconductor
RAC
CAA
CAC
OEA
t
t
CC1
CC2
RC
PC
44
43
42
41
40
39
38
37
36
35
32
31
30
29
28
27
26
25
24
23
AS4C256K16E0-30
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
180
2.0
30
16
10
10
65
12
• Refresh
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
• 5V power supply
• Latch-up current > 200 mA
Pin designation
Pin(s)
A0 to A8
RAS
I/O0 to I/O15
OE
UCAS
LCAS
WE
V
GND
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
CC
only. Contact Alliance for more information.
®
AS4C256K16E0-35
Description
Address inputs
Row address strobe
Input/output
Output enable
Column address strobe, upper byte
Column address strobe, lower byte
Read/write control
Power (5V
Ground
160
2.0
35
18
10
10
70
14
Copyright © Alliance Semiconductor. All rights reserved.
0.5V)
AS4C256K16E0-50
AS4C256K16E0
140
2.0
50
25
10
10
85
25
1 of 24
Unit
mA
mA
ns
ns
ns
ns
ns
ns
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