MC14538BDG ON Semiconductor, MC14538BDG Datasheet - Page 8

• Manufacturer Part Number: MC14538BDG
• Description: IC MULTIVIBRATOR DUAL 16-SOIC
• Manufacturer: ON Semiconductor
• Series: 4000Br

Specifications of MC14538BDG

• Logic Type: Monostable
• Independent Circuits: 2
• Schmitt Trigger Input: No
• Propagation Delay: 95ns
• Current - Output High, Low: 8.8mA, 8.8mA
• Voltage - Supply: 3 V ~ 18 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Elements Per Chip: 2
• Logic Family: 4000
• Input Bias Current (max): 0.7 mA
• Propagation Delay Time: 600 ns, 300 ns, 220 ns
• High Level Output Current: - 4.2 mA
• Low Level Output Current: 4.2 mA
• Supply Voltage (max): 18 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V, 9 V, 12 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC14538BDG; MC14538BDGOS

TRIGGER OPERATION
Figure 1, with circuit operation following.
occurs, the monostable is in the quiescent state with the Q
output low, and the timing capacitor C
to V
(while inputs B and Reset are held to V
recognized, which turns on comparator C1 and N−channel
transistor N1 . At the same time the output latch is set. With
transistor N1 on, the capacitor C
V
comparator C1 changes state and transistor N1 turns off.
Comparator C1 then turns off while at the same time
comparator C2 turns on. With transistor N1 off, the capacitor
C
V
C2 changes state, causing the output latch to reset (Q goes
low) while at the same time disabling comparator C2 . This
ends at the timing cycle with the monostable in the quiescent
state, waiting for the next trigger.
the current through resistor R
are “off” with total device current due only to reverse
junction leakages. An added feature of the MC14538B is
that the output latch is set via the input trigger without regard
to the capacitor voltage. Thus, propagation delay from
trigger to Q is independent of the value of C
cycle of the input waveform.
RETRIGGER OPERATION
followed by another valid trigger
returned to the quiescent (zero) state. Any retrigger, after the
timing node voltage at pin 2 or 14 has begun to rise from
V
in output pulse width T. When a valid retrigger is initiated
progressing along the RC charging curve toward V
Q output will remain high until time T, after the last valid
retrigger.
RESET OPERATION
output pulse. In the reset mode of operation, an input pulse
X
ref 1
SS
DD
, the voltage at C
The block diagram of the MC14538B is shown in
As shown in Figure 1 and 10, before an input trigger
In the quiescent state, C
The MC14538B is retriggered if a valid trigger occurs
The MC14538B may be reset during the generation of the
begins to charge through the timing resistor, R
DD
. When the voltage across C
until V
, but has not yet reached V
. When the trigger input A goes from V
ref1
is reached. At this point the output of
X
/R
X
X
will again drop to V
is fully charged to V
X
to be zero. Both comparators
X
X
ref 2
rapidly discharges toward
equals V
before the Q output has
, will cause an increase
X
DD
completely charged
) a valid trigger is
X
ref 2
, R
X
, comparator
, or the duty
ref 1
DD
SS
X
, toward
DD
to V
causing
http://onsemi.com
before
. The
MC14538B
DD
8
on Reset sets the reset latch and causes the capacitor to be
fast charged to V
voltage on the capacitor reaches V
clear, and will then be ready to accept another pulse. It the
Reset input is held low, any trigger inputs that occur will be
inhibited and the Q and Q outputs of the output latch will not
change. Since the Q output is reset when an input low level
is detected on the Reset input, the output pulse T can be made
significantly shorter than the minimum pulse width
specification.
POWER−DOWN CONSIDERATIONS
large amount of energy stored. When a system containing
the MC14538B is powered down, the capacitor voltage may
discharge from V
at pin 2 or 14. Current through the protection diodes should
be limited to 10 mA and therefore the discharge time of the
V
For example, if V
should discharge no faster than (10 V) x (10 mF)/(10 mA)
= 10 ms. This is normally not a problem since power
supplies are heavily filtered and cannot discharge at this rate.
the MC14538B can sustain damage. To avoid this possibility
use an external clamping diode, D
Fig. 11.
DD
Large capacitance values can cause problems due to the
When a more rapid decrease of V
supply must not be faster than (V
Figure 11. Use of a Diode to Limit
Power Down Current Surge
DD
DD
DD
V
by turning on transistor P1 . When the
= 10 V and C
through the standard protection diodes
SS
C
x
RESET
Q
Q
X
X
D
R
ref 2
= 10 mF, the V
, connected as shown in
DD
x
x
V
V
, the reset latch will
to zero volts occurs,
DD
DD
DD
). (C)/(10 mA).
DD
supply