BU4021B Rohm Semiconductor, BU4021B Datasheet - Page 12

IC SHIFT REGISTER 8BIT 16DIP

BU4021B

Manufacturer Part Number
BU4021B
Description
IC SHIFT REGISTER 8BIT 16DIP
Manufacturer
Rohm Semiconductor
Series
4000Br
Datasheets

Specifications of BU4021B

Logic Type
Shift Register
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Parallel or Serial to Serial
Voltage - Supply
3 V ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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●Reference data(BU4028B)
●Description of BU4015B series model
© 2009 ROHM Co., Ltd. All rights reserved.
BU4015B,BU4015BF,BU4021B,BU4021BF,
BU4094BC,BU4094BCF,BU4094BCFV,BU4538B,BU4028B
www.rohm.com
CLOCK B
RESET A
(*) Switching characteristics is shown in P15.
Function:Dual 4-bit static shift register
1) Description of operation
PIN arrangement
Q3B
Q2B
Q1A
Q0A
VSS
DA
50
40
30
20
10
400
350
300
250
200
150
100
0
50
Dual 4-bit static shift register of BU4015B is configured with 2 independent serial input/parallel output registers of the same 4-state.
Each register is provided with an independent clock and reset input having one series data input. Register state is the D
type master/slave flip-flop. Data is shifted to the next stage during the rise time of the clock. Each register can be cleared
by addition of “H” level to reset.
0
Fig.43 Propagation delay tTHL
0
1
2
3
4
5
6
7
8
-50
-40[℃]
VDD=10[V]
25[℃]
Fig.40 Output source
VDD=15[V]
-25
current-voltage
Operating Temperature Range
Q3 Q2 Q1 Q0
Q0 Q1 Q2 Q3
Ambient Temperature [℃]
CL
CL
85[℃]
5
VDD=5[V]
-40[℃]
-40[℃]
Output Voltage [V]
R
R
0
D
D
25[℃]
25[℃]
85[℃]
85[℃]
10
25
16
15
14
13
12
11
10
9
50
VDD=10[V]
VDD=16[V]
VDD
D8
RESET B
Q0B
Q1B
Q2B
Q3A
CLOCK A
VDD=3[V]
VDD=5[V]
15
[BU4028B]
[BU4028B]
Truth table
75
X:Don't Care
CLOCK
CLOCK
RESET
D
X
100
20
Block diagram
D
L
H
X
X
D
CL
R
RESET
50
40
30
20
10
500
400
300
200
100
Q
Q
0
0
L
L
L
H
0
-50
Q0
Fig.44 Propagation delay tPLH
D
CL
-25
R
Q0
Fig.41 Output sink
L
H
L
L
Q
Q
Operating Temperature Range
current-voltage
Ambient Temperature [℃]
5
-40[℃]
Q1
25[℃]
85[℃]
Output Voltage [V]
12/17
Q1
Q0
Q0
0
D
CL
L
No Change
VDD=5[V]
R
Q
Q
10
25
Q2
Q1
Q1
-40[℃]
Q2
25[℃]
85[℃]
L
50
D
CL
VDD=10[V]
VDD=16[V]
Q3
Q2
Q2
VDD=10[V]
R
VDD=3[V]
VDD=5[V]
L
15
VDD=15[V]
Q
Q
[BU4028B]
[BU4028B]
-40[℃]
25[℃]
85[℃]
75
Q3
100
20
PIN No.
PIN description
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
CLOCKB
CLOCKA
RESETA
RESETB
400
350
300
250
200
150
100
500
400
300
200
100
Symbol
50
VDD
Q3B
Q2A
Q1A
Q0A
VSS
Q3A
Q2B
Q1B
Q0B
0
0
DA
DB
Fig.42 Propagation delay tTLH
-50
-50
Fig.45 Propagation delay tPHL
[BU4028B]
[BU4028B]
-25
-25
Operating Temperature Range
Ambient Temperature [℃]
Ambient Temperature [ ℃ ]
I/O
Operating Voltage Range
O
O
O
O
O
O
O
O
I
I
I
I
I
I
0
0
Technical Note
Reset input (CHA)
Reset input (CHB)
2009.06 - Rev.A
Clock input (CHB)
Clock input (CHA)
Data input (CHA)
Data input (CHB)
25
25
Power supply(+)
Output 3 (CHB)
Output 2 (CHA)
Output 1 (CHB)
Output 0 (CHA)
Power supply(-)
Output 3 (CHA)
Output 2 (CHB)
Output 1 (CHB)
Output 0 (CHB)
Function
50
50
VDD=10[V]
VDD=16[V]
VDD=5[V]
VDD=3[V]
VDD=5[V]
VDD=10[V]
VDD=16[V]
VDD=3[V]
75
75
100
100

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