AS5030_1 AMSCO [austriamicrosystems AG], AS5030_1 Datasheet - Page 22

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AS5030_1

Manufacturer Part Number
AS5030_1
Description
8 BIT PROGRAMMABLE HIGH SPEED MAGNETIC ROTARY ENCODER
Manufacturer
AMSCO [austriamicrosystems AG]
Datasheet
AS5030 8-bit Programmable Magnetic Rotary Encoder
The differentiator between Low Power Mode and Ultra Low Power Mode is the current consumption and the wake-up time to
switch back to active operation.
In both Reduced Power Modes, the AS5030 is inactive. The last state, e.g. the angle, AGC value, etc. is frozen and the chip
starts from this frozen state when it resumes active operation. This method provides much faster start-up than a “cold start”
from zero. If the AS5030 is cycled between active and reduced current mode, a substantial reduction of the average supply
current can be achieved. The minimum dwelling time in active mode is the wake-up time. The actual active time depends on how
much the magnet has moved while the AS5030 was in reduced power mode. The angle data is valid, when the status bit LOCK
has been set (see 5.2.1). Once a valid angle has been measured, the AS5030 can be put back to reduced power mode. The
average power consumption can be calculated as:
where:
I
I
I
t
t
Example: Ultra Low Power Mode; sampling period = one measurement every 10ms.
System constants = I
see Figure 27 for an overview table of the average current consumption in the various reduced power modes.
Reducing Power Supply Peak Currents
An optional RC-filter (R1/C1) may be added to avoid peak currents in the power supply line when the AS5030 is toggled
between active and reduced power mode. R1 must be chosen such that it can maintain a VDD voltage of 4.5V ~ 5.5V under all
conditions, especially during long active periods when the charge on C1 has expired. C1 should be chosen such that it can
support peak currents during the active operation period. For long active periods, C1 should be large and R1 should be small.
8.2
currents in the three reduced power modes, depending on the sampling interval. The graphs shows that the Low Power Mode is
the best option for sampling intervals <4ms, while the Ultra Low Power Mode is the best option for sampling intervals between
Rev. 1.8
I
I
avg
active
power_down
on
off
avg
avg
:
:
:
=
=
100n
14
Power Cycling Mode
I
:
active
mA
AS5030
average current consumption
current consumption in active mode
current consumption in reduced power mode
time period during which the chip is operated in active mode
time period during which the chip is in reduced power mode
VDD
S
500
VSS
500
t
on
I
on
0
active
t
μ
μ
N
C1 C2
+
on
s
s
t
on
I
+
+
+
= 14mA, I
power
t
off
9
30
t
5 ,
off
Mode
Active operation
Low Power Mode
Ultra Low Power Mode
CLK
CS
μ
DIO
ms
_
A
down
10k
*
power_down
9
5 ,
ms
t
off
>1µF
=
C1
= 30µA, ton(min) = 500µs (startup from Ultra Low Power Mode):
729
ton
www.austriamicrosystems.com
toff
μ
R1
A
sampling interval = t
on/off
14 mA
1.4 mA
30 µA
Consumption
Controller
Current
Micro
VDD
VSS
(typ.)
VDD
VSS
+5V
on
1.0 ms (without AGC)
3.8 ms(with locked AGC)
0.15 ms
0.5 ms
Wake-up Time to Active
+ t
The power cycling method shown in Figure 26
cycles the AS5030 by switching it on and off, using
an external PNP transistor high side switch.
This mode provides the least power consumption of
all three modes; when the sampling interval is more
than 400ms, as the current consumption in off-
mode is zero.
It also has the longest start-up time of all modes,
as the chip must always perform a “cold start“ from
zero, which takes about 1.9 ms (see 8.1).
The optional filter R1/C1 may again be added to
reduce peak currents in the 5V power supply line.
Figure 26: Application example III: ultra-low power encoder
Figure 27 shows an overview of the average supply
off
Operation
Page 22 of 33

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