AM7996DCTR AMD [Advanced Micro Devices], AM7996DCTR Datasheet - Page 4

• Manufacturer Part Number: AM7996DCTR
• Description: IEEE 802.3/Ethernet/Cheapernet Transceiver
• Manufacturer: AMD [Advanced Micro Devices]

quirements of IEEE 802.3, Rev. D.
PIN DESCRIPTION
Attachment Unit Interface (AUI)
Dl+, Dl–
Receive Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
transmission lines. Signals at RXT meeting bandwidth
requirements and carrier sense levels are outputted at
Dl . Signaling at Dl
IEEE 802.3, Rev. D.
Cl+, Cl–
Collision Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
transmission lines. Signal Quality Error (SQE), de-
tected at DO inputs (excessive transmissions) or RXT
input (during a collision), outputs the 10 MHz internal
oscillator signal to the AUI interface. For proper compo-
nent values at COLL OSC, signaling at Cl meets re-
DO+, DO–
Transmit Input (Differential Inputs)
A pair of internally biased line receivers consisting of a
squelch detect receiver with offset and noise filtering
and a data receiver with zero offset for data signal pro-
cessing. Signals meeting squelch requirements are
waveshaped and output at TXT.
Coaxial Media Interface (TAP)
RXT
Media Signal Receiver Input (Input)
RXT connects to the media through a 4:1 attenuator of
100 k
Return for the attenuator is V
input with internal AC coupling for Manchester data sig-
nals and direct coupling for Carrier Detect and SQE av-
erage level detection. Signals at RXT meeting carrier
squelch enable data to the Dl outputs. Data signals
are AC coupled to Dl with a 150 ns time constant,
high-pass filter. Signals meeting SQE levels enable
COLL OSC frequency to Cl outputs.
TXT
Tap Node Driver (Input/Output)
A controlled bandwidth current source and sense am-
plifier. This l/O port is to be connected to the media
through an isolation network and a low-pass filter. Sig-
nals meeting DO squelch and jabber timing require-
ments are output at TXT as a controlled rise and fall
time current pulse. When operated into a double termi-
nated 50
IEEE 802.3, Rev. D recommendations for amplitude,
pulse-width distortion, rise and fall times, and harmonic
content. The sense amplifier monitors TXT faults and
inhibits transmission.
4
total resistance (25 k
transmission line, signaling meets
meets requirements of
COL
and 75 k
. RXT is an analog
in series).
Am7996
Global Signals
VC
Timing Reference Set (Input)
VC
respect to V
VC
squelch timing, SQE oscillator frequency, and receive
and SQE output drive levels are set. SQE frequency
set is also determined by components connected be-
tween V
SQE TEST
Signal Quality Error Test Enable (Input)
The SQE Test function is enabled by connecting the
SQE TEST pin to V
V
Tap Node Driver Current Set (Inputs)
A reference input for transmission level and external re-
dundant jabber. Transmit level is set by an external re-
sistor between V
R = 9.09
V
than V
is output at the Cl pair.
TAP SHIELD
Low-Noise Media Cable Return (Input)
This input is the return for V
ceive signal from the media. External connection is to
a positive power supply.
V
SQE Reference Voltage (Bias Supply)
SQE sense voltage and RXT input amplifier reference.
An internally set analog reference for SQE level and data
signal set at –1.600 V nominal with a source resistance
of 150
respect to TAP SHIELD (see Applications section for ad-
justing threshold levels for other applications).
COLL OSC
SQE Timing Set (Input)
Timing input for SQE oscillator. For a properly set input
at VC
10 MHz SQE oscillator frequency, R should be 1 k and
C 47 pF, including interconnect and device capacitance.
V
Positive Logic Supply
V
SQE Timing Reference (Positive Supply Voltage)
Timing reference return for SQE oscillator and analog
signal ground.
V
Negative Logic Supply and IC Substrate
EE
TX+
COL
CC1
CC2
EE
REF
REF
REF
+ 1 V. When the voltage at V
, V
REF
EE
is a compensated voltage reference input with
and V
CC1
TX–
, SQE oscillator period is set at 2.1RC. For a
nominal. This reference should be filtered with
+ 2 V, TXT is disabled and an SQE message
). V
and COLL OSC.
EE
EE
. When a resistor is connected between
TX–
, then internal transmit and receive
TX+
EE
may be operated between V
and V
and disabled by connecting to V
TX–
COL
(for an 80 mA peak level,
TX–
reference and the re-
goes more positive
EE
and
CC
.