AM79C031 ETC1 [List of Unclassifed Manufacturers], AM79C031 Datasheet
AM79C031
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AM79C031 Summary of contents
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Am79213/Am79C203/031 Advanced Subscriber Line Interface Circuit (ASLIC™) Device Advanced Subscriber Line Audio-Processing Circuit (ASLAC™) Device DISTINCTIVE CHARACTERISTICS Performs all of the functions of a codec-filter Single channel architecture Performs Battery-feed, Ring-trip, Signaling, Coding, Hybrid and Test (BORSCHT) ...
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TABLE OF CONTENTS Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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LIST OF FIGURES Figure 1. Transmit and Receive Path Attenuation vs. Frequency . . . . . . . . . . . . . . . . . . . 26 Figure 2. Group Delay Distortion . . . ...
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The Am79213/Am79C203/031 Advanced Subscriber Line Interface chip set implements a universal telephone line interface function. This enables the design of a single, low cost, high performance, fully software programmable line interface card for multiple country applications world wide. All AC, ...
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ORDERING INFORMATION ASLIC Device Must order Am79C203 or Am79C2031 with the device below. Am79213 J Valid Combinations Am79213 Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed ...
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ORDERING INFORMATION (continued) ASLAC Device Must order Am79213 with the device below. Am79C203/031 J Valid Combinations Am79C203 Am79C2031 Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed ...
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CONNECTION DIAGRAMS Top View 32-Pin PLCC RY2OUT RY3OUT RINGOUT TMG QBAT Notes: 1. RSVD = Reserved. Do not connect to this pin Connect FS I/O1 I/O2 DCLK DI/O VCCD ...
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CONNECTION DIAGRAMS (continued) Top View 44-Pin PLCC FS 7 I/ I/O3 DCLK 11 DI/O 12 VCCD Note: RSVD = Reserved. Do not connect to this pin. 8 ...
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PIN DESCRIPTIONS ASLIC Device Pin Names Type AD, BD Output A and B Line Drivers. These pins provide the currents to the A and B leads of the sub- scriber loop. BAL1 Input Pre-balance. This pin receives voltages that are ...
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Pin Names Type VLBIAS Input VREF Input VTX Output ASLAC Device Pin Names Type AGND Gnd C2–C1 Output CS Input, Active Low DCLK Input DGND Gnd DI/O Input/Output DRA, DRB Input DXA, DXB Output FS Input IAB Input IBAT Input ...
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Pin Names Type IDC Output DC Loop Control Current. The IDC output supplies a current to the ASLIC device for pro- portional control of the DC loop current flowing through the subscriber loop. IDIF Input Longitudinal Sense. IDIF is a ...
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Pin Names Type VLBIAS Output Longitudinal Reference. VLBIAS is programmed by VOFF and supplies the longitudinal reference voltage for the longitudinal control loop to the ASLIC device. VM Output 12/16 kHz Metering Signal. For 12/16 kHz teletax, an internally generated ...
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ASLIC/ASLAC DEVICES FUNCTIONAL DESCRIPTION The ASLIC/ASLAC devices chip set integrates all func- tions of the subscriber line. The chip set comprises an ASLIC device and an ASLAC device. The set provides two basic functions: 1) the ASLIC device, a high-voltage, ...
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The PCM data can be either 8-bit companded A-law code, 8-bit companded µ-law code, or 16-bit linear code. Voice data is transmitted and received via the PCM highway; control information is written to and read from the ASLAC/ASLIC devices chip ...
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ELECTRICAL REQUIREMENTS Power Dissipation Loop resistance = 0 to ∞ (not including fuse resistors Ω fuse resistors, VBAT = QBAT = –48 V, VCC = +5 V. For power dissipation measurements, DC Feed conditions are programmed as ...
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ABSOLUTE MAXIMUM ELECTRICAL AND THERMAL RATINGS ASLIC Device Storage temperature...................–55°C ≤ T Ambient temperature, under bias................................–40°C ≤ T Ambient relative humidity (noncondensing).................................. 5% to 100% V with respect to AGND/DGND......... –0 with ...
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PERFORMANCE SPECIFICATIONS (See note 0°C to 70°C unless otherwise noted. A No. Item 1 2-wire loop voltage Standby state, R Active state, RL IRSN = 140 µA Disable state, RL IRSN = 80 µA 2 Feed resistance ...
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Table 2. ASLIC Device DC Specifications (continued) No. Item 12 ISUM/ILOOP ILOOP = IDIF/ILONG ILONG = Input current, SA and SB pins 15 Input current HPA and HPB pins 16 IDC input impedance 17 ...
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Table 4. ASLIC Device Transmission Specifications (continued) No. Item 4-wire gain –10 dBm, 1 kHz 4-wire gain variation 300 to 3400 Hz relative to 1 kHz with frequency ...
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Table 4. ASLIC Device Transmission Specifications (continued) No. Item 16 PSRR ( 3400 Hz CC 3.4 kHz to 50 kHz 17 Low frequency induction Active state, VLONG = 30 Vrms, (REA method Longitudinal AC current ...
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Table 5. ASLAC Device DC Specifications (continued) No. Item 9 IDC error among Any ILA or ILD programmed value > (IDC > 78.7 µA) programmed ILA, ILD Any ILA or ILD programmed value ≤ (IDC ≤ ...
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Table 6. ASLAC Device Transmission and Signaling Specifications No. Item 1 Insertion loss Input: 1014 Hz, –10 dBm0 dB, AISN and Z filters disabled A-D T ...
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Table 6. ASLAC Device Transmission and Signaling Specifications (continued) No. Item 11 Switchhook thresholds All TSH settings Switchhook hysteresis All TSH settings 12 Ground-key thresholds All TGK settings Ground-key hysteresis All TGK settings 13 Voltage that sets Voltage on ASLIC ...
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Ambient temperature = 70°C Active state, normal polarity for transmission performance 0 dBm = 600 Ω (0.775 Vrms) Programmed DC Feed conditions: VAPP (apparent battery voltage) = 50.2 V ILA (Active state loop-current limit) = 47.6 mA ...
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In the following section, the transmit path is defined as the section between the analog input to the ASLAC device (VIN) and the PCM voice output of the ASLAC device A-law/µ-law speech compressor (shown in the technical overview document). The ...
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Attenuation Distortion The deviations from nominal attenuation will stay within the limits shown in Figure 1. The reference frequency is 1014 Hz and the signal level is –10 dBm0. Minimum transmit attenuation dB ...
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Group Delay Distortion For either transmission path, the group delay distortion is within the limits shown in Figure 2. The minimum value of the group delay is taken as the reference. The signal level should be –10 dBm0. 420 Delay ...
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Gain Linearity The gain deviation relative to the gain at –10 dBm0 is within the limits shown in Figure 3 (A-law) and Figure 4 (µ- law) for either transmission path when the input is a sine wave signal of 1014 ...
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Total Distortion, Including Quantizing Distortion The signal-to-total distortion ratio will exceed the limits shown in Figure 5 for either path when the input signal is a sine wave signal of frequency 1014 Hz. Improved distortion at lower levels in LSSGR ...
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Overload Compression Figure 6 shows the acceptable region of operation for input signal levels above the reference input power (0 dBm0). The conditions for this figure are: ( < transmit path ≤ +12 dB; (2) –12 dB ≤ ...
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SWITCHING CHARACTERISTICS Microprocessor Interface Min. and Max. values are valid for all digital outputs with a 100 pF load, except DI/O, DXA, and DXB, which are valid with 150 pF loads. No. Symbol 1 t Data clock period DCY 2 ...
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No. Symbol 22 t PCM clock period PCY 23 t PCM clock High pulse width PCH 24 t PCM clock Low pulse width PCL 25 t Fall time of clock PCF 26 t Rise time of clock PCR 27 t ...
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Master Clock For 2.048 MHz ± 100 ppm, 4.096 MHz ± 100 ppm, or 8.192 MHz ± 100 ppm operation: No. Symbol 37 t Master clock period (2.048 MHz) MCY Master clock period (4.096 MHz) Master clock period (8.192 MHz) ...
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SWITCHING WAVEFORMS Input and Output Waveforms for AC Tests 2.4 0.45 Master Clock Timing 2.0 2 Test Points 0.8 0 Am79213/Am79C203/031 Data Sheet 38 ...
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Microprocessor Interface (Input Mode VIH DCLK VIL VIL Data D IN Valid In/Outputs C1, C2, I/O1, I/O2, I/O3*, I/O4* * Available on 44-pin version only Microprocessor Interface (Output Mode) VIH DCLK VIL 13 ...
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PCM Highway Timing for (Transmit on Negative PCLK Edge PCLK IL FS TSCA / TSCB 32 DXA/DXB DRA/DRB 36 Time Slot Zero Clock Slot Zero ...
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PCM Highway Timing for (Transmit on Positive PCLK Edge PCLK TSCA/ TSCB 32 DXA/DXB DRA/DRB Time Slot Zero Clock Slot Zero ...
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Table 10. User-Programmable Components • 63.5 Z – 2WIN F • Z 254 ----------- - -------------------------------------------------------- - • • 63 ...
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ASLIC/ASLAC DEVICES LINECARD SCHEMATIC ASLIC (32-Pin PLCC) RSA RFA K1A A CAD K2A + VCC C. TEST U3 E BATTERY 4 2 BUS CHP RSB RFB K2B B ...
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Table 11. ASLIC/ASLAC Devices Linecard Parts List Item Type U1 ASLIC device U2 ASLAC device U3 TCM1060 D1 Diode RFA, RFB Resistor RSA, RSB Resistor RSR1, RSR2 Resistor RGFD1 Resistor RRX* Resistor RT* Resistor RBAT1, RBAT2 Resistor RAB Resistor RREF ...
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PROGRAMMABLE FILTERS General Description of CSD Coefficients The filter functions are performed by a series of multiplications and accumulations. A multiplication is accomplished by repeatedly shifting the multiplicand and summing the result with the previous value at that summation node. ...
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the ASLAC device, a coefficient, h ...
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PHYSICAL DIMENSION PL032 .485 .495 .447 .453 .585 Pin 1 I.D. .595 .547 .553 .026 .032 TOP VIEW PL044 .685 .695 .650 .656 Pin 1 I.D. .685 .695 .650 .656 .026 .050 REF .032 TOP VIEW .009 .015 .125 .140 ...
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REVISION SUMMARY Revision A to Revision B • Fixed the figure numbering. • Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision B to Revision C • The physical dimension (PL032 and ...
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Notes: www.legerity.com ...
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Notes: Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers' products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and ...
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The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with re- spect to the accuracy or completeness of the contents of this publication and reserves the right to make changes ...
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P.O. Box 18200 Austin, Texas 78760-8200 Telephone: (512) 228-5400 Fax: (512) 228-5510 North America Toll Free: (800) 432-4009 To contact the Legerity Sales Office nearest you download or order product literature, visit our website at www.legerity.com. To order ...