24LC128ISN Microchip Technology Inc., 24LC128ISN Datasheet

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24LC128ISN

Manufacturer Part Number
24LC128ISN
Description
SOP
Manufacturer
Microchip Technology Inc.
Datasheets

Specifications of 24LC128ISN

Date_code
04+
DEVICE SELECTION TABLE
FEATURES
• Low power CMOS technology
• 2-wire serial interface bus, I
• Cascadable for up to eight devices
• Self-timed ERASE/WRITE cycle
• 64-byte page-write mode available
• 5 ms max write-cycle time
• Hardware write protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt trigger inputs for noise suppression
• 1,000,000 erase/write cycles guaranteed
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP and SOIC (150 and 208 mil) packages
• 14-pin TSSOP package
• Temperature ranges:
DESCRIPTION
The Microchip Technology Inc. 24AA128/24LC128
(24xx128*) is a 16K x 8 (128K bit) Serial Electrically
Erasable PROM, capable of operation across a broad
voltage range (1.8V to 5.5V). It has been developed for
advanced, low power applications such as personal
communications or data acquisition. This device also
has a page-write capability of up to 64 bytes of data.
This device is capable of both random and sequential
reads up to the 128K boundary. Functional address
lines allow up to eight devices on the same bus, for up
to 1M bit address space. This device is available in the
standard 8-pin plastic DIP, 8-pin SOIC (150 and
208 mil), and 14-pin TSSOP packages.
I
*24xx128 is used in this document as a generic part number for the 24AA128/24LC128 devices.
M
2
C is a trademark of Philips Corporation.
100 kHz for V
100 kHz for E temperature range.
24AA128
24LC128
- Maximum write current 3 mA at 5.5V
- Maximum read current 400 A at 5.5V
- Standby current 100 nA typical at 5.5V
- Industrial (I):
- Automotive (E):
1998 Microchip Technology Inc.
Number
Part
CC
1.8-5.5V
2.5-5.5V
Range
V
< 2.5V.
CC
128K I
-40 C to
-40 C to +125 C
Frequency
Max Clock
400 kHz
400 kHz
2
C compatible
2
+85 C
C
Ranges
Temp
CMOS Serial EEPROM
I, E
I
24AA128/24LC128
PACKAGE TYPE
BLOCK DIAGRAM
PDIP
SOIC
TSSOP
SDA
I/O
V
V
CONTROL
CC
SS
LOGIC
I/O
SCL
A0…A2
Vss
V
A0
A1
A2
A0
A1
A2
Vss
SS
NC
NC
NC
A0
A1
A2
CONTROL
MEMORY
LOGIC
1
2
3
4
WP
1
2
3
4
5
6
7
1
2
3
4
XDEC
14
13
12
11
10
9
8
8
7
6
5
8
7
6
5
DS21191B-page 1
Vcc
WP
NC
NC
NC
SCL
SDA
HV GENERATOR
PAGE LATCHES
R/W CONTROL
V
WP
SCL
SDA
Vcc
WP
SCL
SDA
SENSE AMP
CC
EEPROM
ARRAY
YDEC

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