74ACT139SC Fairchild Semiconductor, 74ACT139SC Datasheet - Page 2

IC DECODER/DEMUX DL 1OF4 16-SOIC

74ACT139SC

Manufacturer Part Number
74ACT139SC
Description
IC DECODER/DEMUX DL 1OF4 16-SOIC
Manufacturer
Fairchild Semiconductor
Series
74ACTr
Type
Decoder/Demultiplexerr
Datasheet

Specifications of 74ACT139SC

Circuit
1 x 2:4
Independent Circuits
2
Current - Output High, Low
24mA, 24mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Logical Function
Decoder/Demux
Logic Family
ACT
Number Of Elements
2
Polarity
Inverting
Number Of Inputs
2
Number Of Outputs
4
Output Type
Standard
Propagation Delay Time
11ns
Package Type
SOIC N
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Quiescent Current
4uA
Technology
CMOS
Logic Type
Decoder / Demultiplexer
No. Of Outputs
4
Supply Voltage Range
4.5V To 5.5V
Logic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Family Type
74ACT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
Logic Symbols
Truth Table
H
L
X
HIGH Voltage Level
LOW Voltage Level
E
H
Immaterial
L
L
L
L
Inputs
A
H
H
X
L
L
0
A
H
H
X
L
L
1
IEEE/IEC
O
H
H
H
H
L
0
O
H
H
H
H
L
Outputs
1
O
H
H
H
H
L
2
O
H
H
H
H
L
3
2
Functional Description
The AC/ACT139 is a high-speed dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each of which accepts two binary weighted inputs (A
and provides four mutually exclusive active-LOW outputs
(O
When E is HIGH all outputs are forced HIGH. The enable
can be used as the data input for a 4-output demultiplexer
application. Each half of the AC/ACT139 generates all four
minterms of two variables. These four minterms are useful
in some applications, replacing multiple gate functions as
shown in Figure 1, and thereby reducing the number of
packages required in a logic network.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
0
–O
3
). Each decoder has an active-LOW enable (E).
FIGURE 1. Gate Functions (Each Half)
0
–A
1
)

Related parts for 74ACT139SC