74ACT139SCX Fairchild Semiconductor, 74ACT139SCX Datasheet
74ACT139SCX
Specifications of 74ACT139SCX
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74ACT139SCX Summary of contents
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... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation Features I reduced by 50% ...
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Logic Symbols IEEE/IEC Truth Table Inputs Outputs ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...
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DC Electrical Characteristics for ACT V CC Symbol Parameter (V) V Minimum HIGH Level 4.5 IH Input Voltage 5.5 V Maximum LOW Level 4.5 IL Input Voltage 5.5 V Minimum HIGH Level 4.5 OH Output Voltage 5.5 4.5 5.5 V ...
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AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH Propagation Delay PHL Propagation Delay PLH Propagation Delay PHL E to ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body www.fairchildsemi.com Package Number M16A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC16 8 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...