MC74HCT138ADTR2G ON Semiconductor, MC74HCT138ADTR2G Datasheet

no-image

MC74HCT138ADTR2G

Manufacturer Part Number
MC74HCT138ADTR2G
Description
IC DECODER/DEMUX 1:8 16TSSOP
Manufacturer
ON Semiconductor
Series
74HCTr
Type
Decoder/Demultiplexerr
Datasheet

Specifications of MC74HCT138ADTR2G

Circuit
1 x 3:8
Independent Circuits
1
Current - Output High, Low
4mA, 4mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Product
Decoder / Demultiplexer
Logic Family
74HCT
Number Of Bits
3
Number Of Lines (input / Output)
6 / 8
Propagation Delay Time
27 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Number Of Input Lines
6
Number Of Output Lines
8
Power Dissipation
450 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74HCT138ADTR2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC74HCT138A
1-of-8 Decoder/
Demultiplexer with LSTTL
Compatible Inputs
High−Performance Silicon−Gate CMOS
HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
active−lot outputs. This device features three Chip Select inputs, two
active−low and one active−high to facilitate the demultiplexing,
cascading, and chip−selecting functions. The demultiplexing function
is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the
other Chip Selects are held in their active states.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 9
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74HCT138A is identical in pinout to the LS138. The
The HCT138A decodes a three−bit Address to one−of−eight
No. 7A
Output Drive Capability: 10 LSTTL Loads
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 mA
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 122 FETs or 30.5 Equivalent Gates
Pb−Free Packages are Available*
1
16
16
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
16
1
1
A
WL, L
YY, Y
WW, W
G or G
(Note: Microdot may be in either location)
1
ORDERING INFORMATION
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
CASE 751B
CASE 948F
TSSOP−16
DT SUFFIX
CASE 648
N SUFFIX
D SUFFIX
SOIC−16
PDIP−16
Publication Order Number:
16
16
1
1
MC74HCT138AN
MC74HCT138A/D
DIAGRAMS
AWLYYWWG
16
1
MARKING
HCT138AG
AWLYWW
ALYWG
138A
HCT
G

Related parts for MC74HCT138ADTR2G

MC74HCT138ADTR2G Summary of contents

Page 1

... Chip Complexity: 122 FETs or 30.5 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 December, 2009 − Rev. 9 http://onsemi.com PDIP− ...

Page 2

LOGIC DIAGRAM 1 A0 ADDRESS 2 A1 INPUTS CS1 CHIP- 4 SELECT CS2 INPUTS 5 CS3 Î Î Î Î Î Î Î Î Î Î Design Criteria Î Î Î Î Î Î Î Î Î ...

Page 3

MAXIMUM RATINGS Symbol Parameter V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) out I DC Input Current, per Pin Output Current, per ...

Page 4

AC ELECTRICAL CHARACTERISTICS Symbol t , Maximum Propagation Delay, Input A to Output Y PLH t (Figures 1 and 4) PHL t , Maximum Propagation Delay, CS1 to Output Y PLH t (Figures 2 and 4) PHL t , Maximum ...

Page 5

VALID VALID 1.3 V INPUT PLH PHL 1.3 V OUTPUT Y Figure 1. INPUT CS2, CS3 t OUTPUT Y SWITCHING WAVEFORMS 3 V INPUT CS1 GND t PHL OUTPUT Y t THL 2.7 ...

Page 6

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 PACKAGE DIMENSIONS PDIP−16 N ...

Page 7

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

Related keywords