AX2000-2FGG896I Actel, AX2000-2FGG896I Datasheet

AX2000-2FGG896I

Manufacturer Part Number

AX2000-2FGG896I

Description

Manufacturer

Actel

Datasheets

1.AX500-1BG896.pdf (226 pages)

2.AX2000-1FG896I.pdf (226 pages)

Specifications of AX2000-2FGG896I

Lead_time

Pack_quantity

Comm_code

85423990

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

AX2000-2FGG896I

Manufacturer:

Microsemi SoC

Quantity:

10 000

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Axcelerator Family FPGAs

Leading-Edge Performance

• 350+ MHz System Performance

• 500+ MHz Internal Performance

• High-Performance Embedded FIFOs

• 700 Mb/s LVDS Capable I/Os

Specifications

• Up to 2 Million Equivalent System Gates

• Up to 684 I/Os

• Up to 10,752 Dedicated Flip-Flops

• Up to 295 kbits Embedded SRAM/FIFO

• Manufactured on Advanced 0.15 μm CMOS Antifuse

Features

• Single-Chip, Nonvolatile Solution

• Up to 100% Resource Utilization with 100% Pin Locking

• 1.5V Core Voltage for Low Power

• Footprint Compatible Packaging

• Flexible, Multi-Standard I/Os:

Table 1-1 • Axcelerator Family Product Profile

November 2008

Device

Capacity (in Equivalent System Gates)

Modules

Embedded RAM/FIFO

Clocks (Segmentable)

PLLs

I/Os

Package

Typical Gates

Combinatorial (C-cells)

Maximum Flip-Flops

Number of Core RAM Blocks

Total Bits of Core RAM

Hardwired

Routed

I/O Banks

Maximum User I/Os

Maximum LVDS Channels

Total I/O Registers

CSP

PQFP

BGA

FBGA

CQFP

CCGA

Process Technology, 7 Layers of Metal

– 1.5V, 1.8V, 2.5V, 3.3V Mixed Voltage Operation

– Bank-Selectable I/Os – 8 Banks per Chip

– Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3V

– Differential I/O Standards: LVPECL and LVDS

PCI, and 3.3V PCI-X

256, 324

125,000

AX125

82,000

18,432

1,344

672

168

504

180

• Embedded Memory:

• Segmentable Clock Resources

• Embedded Phase-Locked Loop:

• Deterministic, User-Controllable Timing

• Unique In-System Diagnostic and Debug Capability

• Boundary-Scan Testing Compliant with IEEE Standard

• FuseLock

256, 484

208, 352

250,000

154,000

AX250

55,296

1,408

2,816

248

124

744

208

– Voltage-Referenced I/O Standards: GTL+, HSTL

– Registered I/Os

– Hot-Swap Compliant I/Os (except PCI)

– Programmable Slew Rate and Drive Strength on

– Programmable Delay and Weak Pull-Up/Pull-Down

– Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4,

– Independent, Width-Configurable Read and Write Ports

– Programmable Embedded FIFO Control Logic

– 14-200 MHz Input Range

– Frequency Synthesis Capabilities up to 1 GHz

with Actel Silicon Explorer II

1149.1 (JTAG)

Prevents Reverse Engineering and Design Theft

Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2

Outputs

Circuits on Inputs

x9, x18, x36 Organizations Available)

484, 676

208, 352

500,000

286,000

*See Actel’s website for the latest version of the datasheet.

AX500

73,728

2,688

5,376

1,008

336

168

Secure

208

Programming

484, 676, 896

1,000,000

AX1000

612,000

165,888

12,096

6,048

1,548

516

258

729

352

624

Technology

2,000,000

1,060,000

896, 1152

AX2000

294,912

10,752

21,504

2,052

684

342

352

624

v 2 . 7

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