MX23C1024QC-12 Macronix International Co., MX23C1024QC-12 Datasheet

MX23C1024QC-12

Manufacturer Part Number

MX23C1024QC-12

Description

Manufacturer

Macronix International Co.

Datasheets

1.MX23C1024.pdf (7 pages)

2.MX23C1024PC-12.pdf (7 pages)

Specifications of MX23C1024QC-12

Case

PLCC

Date_code

1997

Current page: 1 of 7
Download datasheet (46Kb)

FEATURES

• 64K x 16 organization (JEDEC pin out)

• Single +5V power supply

• Fast access time: 120/150/200ns

• Totally static operation

• Completely TTL compatible

GENERAL DESCRIPTION

The MX23C1024 is a 5V only, 1M-bit, Read Only

Memory. It is organized as 64Kx16 bit. MX23C1024

has a static standby mode, and has an access time of

120/150/200ns. It is designed to be compatible with all

microprocessors and similar applications in which high

performance, large bit storage and simple interfacing

are important design considerations.

PIN CONFIGURATION

40 PDIP

44 PLCC

P/N:PM0189

VSS

Q12

Q11

Q10

VSS

Q15

Q14

Q13

Q12

Q11

Q10

MX23C1024

VCC

A15

A14

A13

A12

A11

A10

VSS

A13

A12

A11

A10

VSS

• Operating current: 60mA

• Standby current: 100uA

• Package

MX23C1024 offers automatic power-down, with power-

down controlled by the chip enable (CE) input. When

CE is not selected, the device automatically powers

down and remains in a low-power standby mode as long

as CE stays in the unselected mode.

The OE input as well as CE input may be programmed

active Low.

BLOCK DIAGRAM

PIN DESCRIPTION

- 40 pin DIP (600 mil)

- 44 pin PLCC

Symbol

A0~A15

Q0~Q15

VCC

VSS

ADDRESS

INPUTS

A0~A15

VCC

VSS

1M-BIT [64K x 16] CMOS MASK ROM

MX23C1024

Pin Function

Data Output

Chip Enable Input

Output Enable Input

Power Supply Pin (+5V)

Ground Pin

Address Input

Y-DECODER

X-DECODER

CONTROL

LOGIC

Y-DECODER

ROM ARRAY

BUFFERS

OUTPUT

1M BIT

REV. 1.3, JAN. 29, 1999

Q0~Q15

INDEX

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