EDI88257CAXCB WEDC [White Electronic Designs Corporation], EDI88257CAXCB Datasheet

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EDI88257CAXCB

Manufacturer Part Number
EDI88257CAXCB
Description
256Kx8 Monolithic SRAM
Manufacturer
WEDC [White Electronic Designs Corporation]
Datasheet

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Part Number:
EDI88257CAXCB
Manufacturer:
WEDC
Quantity:
78
256Kx8 Monolithic SRAM
FEATURES
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
May 2000
Rev. 2
Access Times of 20, 25, 35, 45, 55ns
Data Retention Function (LPA Versions)
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Organized as 256Kx8
Commercial, Industrial and Military Temperature
Ranges
JEDEC Approved Evolutionary Pinout
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)
Single +5V (±10%) Supply Operation
I/O0
I/O1
I/O2
A16
A14
A12
V
NC
A2
A7
A6
A5
A4
A3
A0
A1
SS
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
White Electronic Designs
TOP VIEW
32 DIP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
A15
A17
WE#
A13
A11#
OE
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
A8
A9
CC
WE#
A
OE#
CS
0-17
FIGURE 1 – PIN CONFIGURATION
Address
Buffer
BLOCK DIAGRAM
Memory Array
1
Decoder
Address
The EDI88257CA is a 2 Megabit 256Kx8 bit Monolithic
CMOS Static RAM.
The 32 pin DIP pinout adheres to the JEDEC evolutionary
standard for the two megabit device. The device is
upgradeable to the 512Kx8 SRAM, the EDI88512CA. Pin
1 becomes the higher order address.
A Low Power version, EDI88257LPA, offers a data retention
function for battery back-up opperation. Military product is
available compliant to Appendix A of MIL-PRF-38535.
This product is subject to change without notice.
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
Circuits
I/O
I/O
0-7
I/O0-7
A0-17
WE#
CS#
OE#
V
V
NC
CC
SS
PIN DESCRIPTION
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
Output Enable
Power (+5V ±10%)
Ground
Not Connected
EDI88257CA

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EDI88257CAXCB Summary of contents

Page 1

White Electronic Designs 256Kx8 Monolithic SRAM FEATURES Access Times of 20, 25, 35, 45, 55ns Data Retention Function (LPA Versions) TTL Compatible Inputs and Outputs Fully Static, No Clocks Organized as 256Kx8 Commercial, Industrial and Military Temperature Ranges JEDEC Approved ...

Page 2

White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Operating Temperature T (Ambient) A Industrial Military Storage Temperature, Ceramic Power Dissipation Output Current Junction Temperature NOTE: Stress greater than those listed under “Absolute ...

Page 3

White Electronic Designs Parameter JEDEC Read Cycle Time t AVAV Address Access Time t AVQV Chip Enable Access Time t ELQV Chip Enable to Output in Low Z (1) t ELQX Chip Disable to Output in High Z (1) t ...

Page 4

White Electronic Designs FIGURE 2 – TIMING WAVEFORM - READ CYCLE t AVAV ADDRESS ADDRESS AVQV DATA I/O DATA 1 READ CYCLE 1 (WE# HIGH; OE#, CS# LOW) FIGURE 3 – WRITE CYCLE - WE# CONTROLLED ADDRESS ...

Page 5

White Electronic Designs DATA RETENTION CHARACTERISTICS (EDI88512LP ONLY) Characteristic Low Power Version only Data Retention Voltage Data Retention Quiescent Current Chip Disable to Data Retention Time Operation Recovery Time FIGURE 5 – DATA RETENTION - CS# CONTROLLED V CC CS# ...

Page 6

White Electronic Designs PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600mils wide) Pin 1 Indicator 0.200 0.125 0.061 0.017 WHITE ELECTRONIC DESIGNS SRAM ORGANIZATION, 256Kx8 TECHNOLOGY CMOS Standard Power LPA = Low Power ACCESS TIME (ns) PACKAGE TYPE: ...

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