PEEL22CV10AZJ-25 ETC2 [List of Unclassifed Manufacturers], PEEL22CV10AZJ-25 Datasheet - Page 6

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PEEL22CV10AZJ-25

Manufacturer Part Number
PEEL22CV10AZJ-25
Description
CMOS Programmable Electrically Erasable Logic Device
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
PEEL22CV10AZJ-25
Manufacturer:
ICT
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6 250
Part Number:
PEEL22CV10AZJ-25
Manufacturer:
ICT
Quantity:
6 250
Zero Power Feature
The CMOS PEEL™22CV10AZ features “Zero-Power”
standby operation for ultra-low power consumption. With
the “Zero-Power” feature, transition-detection circuitry mon-
itors the inputs, I/Os (including CLK) and feedbacks. If
these signals do not change for a period of time greater
than approximately two t
current state and the device automatically powers down.
When the next signal transition is detected, the device will
“wake up” for active operation until the signals stop switch-
ing long enough to trigger the next power-down.
As a result of the “Zero-Power” feature, significant power
savings can be realized for combinatorial or sequential
operations when the inputs or clock change at a modest
rate (see Figure 23).
Figure 23 Typical ICC vs. Input Clock
Frequency for the 22CV10AZ.
0.001
0.01
100
0.1
10
1
0.001
0.01
22CV10AZ Frequency vs. ICC
PD
Frequency in MHz
s, the outputs are latched in their
0.1
1
10
6 of 10
Design Security
The PEEL™22CV10AZ provides a special EEPROM secu-
rity bit that prevents unauthorized reading or copying of
designs programmed into the device. The security bit is set
by the PLD programmer, either at the conclusion of the pro-
gramming cycle or as a separate step, after the device has
been programmed. Once the security bit is set it is impossi-
ble to verify (read) or program the PEEL™ until the entire
device has first been erased with the bulk-erase function.
Signature Word
The signature word feature allows a 64-bit code to be pro-
grammed
PEEL™22CV10AZ+ software option is used. The code can
be read back even after the security bit has been set. The
signature word can be used to identify the pattern pro-
grammed into the device or to record the design revision,
etc.
Programming Support
ICT’s JEDEC file translator allows easy conversion of exist-
ing 24 pin PLD designs to the PEEL™22CV10AZ, without
the need for redesign. ICT supports a broad range of popu-
lar third party design entry systems, including Data I/O
Synario and Abel, Logical Devices CUPL and others. ICT
also offers (for free) its proprietary PLACE software, an
easy-to-use entry level PC-based software development
system.
Programming support includes all the popular third party
programmers; Data I/O, Logical Devices, and numerous
others. ICT also provides a low cost development program-
mer system, the PDS-3.
into
the
PEEL™ 22CV10AZ
PEEL™22CV10AZ
if
the

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