DS1921G-F5N MAXIM [Maxim Integrated Products], DS1921G-F5N Datasheet - Page 9

• Manufacturer Part Number: DS1921G-F5N
• Description: Thermochron iButton
• Manufacturer: MAXIM [Maxim Integrated Products]

Figure 3. 64-Bit Lasered ROM
Figure 4. 1-Wire CRC Generator
Each DS1921G contains a unique ROM code that is 64
bits long. The first 8 bits are a 1-Wire family code. The
next 48 bits are a unique serial number. The last 8 bits
are a cyclic redundancy check (CRC) of the first 56 bits
(see Figure 3 for details). The 1-Wire CRC is generated
using a polynomial generator consisting of a shift regis-
ter and XOR gates as shown in Figure 4. The polynomi-
al is X
1-Wire CRC is available in Application Note 27:
Understanding and Using Cyclic Redundancy Checks
with Maxim iButton Products .
The Shift register bits are initialized to 0. Then, starting
with the least significant bit of the family code, one bit
at a time is shifted in. After the 8th bit of the family code
has been entered, the serial number is then entered.
After the 48th bit of the serial number has been
entered, the Shift register contains the CRC value.
X
0
8
+ X
MSB
MSB
STAGE
1ST
5
+ X
CRC CODE
X
1
8-BIT
4
_______________________________________________________________________________________
+ 1. Additional information about the
STAGE
2ND
LSB
X
2
MSB
STAGE
64-Bit Lasered ROM
3RD
X
3
STAGE
4TH
POLYNOMIAL = X
48-BIT SERIAL NUMBER
X
4
8
+ X
STAGE
5
5TH
Shifting in the 8 bits of CRC returns the Shift register to
all zeros.
Figure 5 shows the DS1921G memory map. The 4096-bit
general-purpose SRAM makes up pages 0 to 15. The
timekeeping, control, and counter registers fill page 16,
called register page (see Figure 6). Pages 17, 18, and
19 are assigned to storing the alarm timestamps and
durations. The temperature histogram bins begin at page
64 and use up to four pages. The data-log memory cov-
ers pages 128 to 191. Memory pages 20 to 63, 68 to
127, and 192 to 255 are reserved for future extensions.
The scratchpad is an additional page that acts as a
buffer when writing to the SRAM or the register page.
The memory pages 17 and higher are read only for the
user. They are written to or erased solely under the
supervision of the on-chip control logic.
+ X
4
+ 1
Thermochron iButton
X
5
STAGE
6TH
LSB
X
6
MSB
STAGE
7TH
8-BIT FAMILY CODE
(21h)
X
INPUT DATA
7
STAGE
8TH
LSB
LSB
Memory
X
8
9