AS4C256K16F0-25JC ALSC [Alliance Semiconductor Corporation], AS4C256K16F0-25JC Datasheet

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AS4C256K16F0-25JC

Manufacturer Part Number
AS4C256K16F0-25JC
Description
5V 256K X 16 CMOS DRAM (Fast Page Mode)
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
Features
• Organization: 262,144 words × 16 bits
• High speed
• Low power consumption
• Fast page mode
• AS4C256K16FO-50 timings
Pin arrangement
Selection guide
Maximum RAS access time
Maximum column address
access time
Maximum CAS access time
Maximum output enable (OE)
access time
Minimum read or write cycle
time
Minimum EDO page mode
cycle time
Maximum operating current
Maximum CMOS standby
current
- 25/30/35/50 ns RAS access time
- 12/16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
- Active: 770 mW max (ASAS4C256K16FO-50)
- Standby: 5.5 mW max, CMOS I/O
AS4C256K16FO-60.
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
4/11/01; V.0.9.1
RAS
V
V
V
WE
NC
NC
NC
A0
A1
A2
A3
CC
CC
CC
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
SOJ
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
Symbol
t
t
t
t
I
I
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
t
RAC
CAA
CAC
OEA
t
CC1
CC2
RC
PC
RAS
V
V
V
are also valid for
WE
NC
NC
NC
A0
A1
A2
A3
CC
CC
CC
5V 256K X 16 CMOS DRAM (Fast Page Mode)
1
2
3
4
5
6
7
8
9
10
13
14
15
16
17
18
19
20
21
22
TSOP II
Alliance Semiconductor
200
–25
2.0
25
12
40
12
7
7
44
43
42
41
40
39
38
37
36
35
32
31
30
29
28
27
26
25
24
23
V
I/O15
I/O14
I/O13
I/O12
V
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
V
SS
SS
SS
• Refresh
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
• Single 5V power supply/built-in V
• Latch-up current > 200 mA
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
device only. Contact Alliance for more information.
Pin designation
180
–30
2.0
30
16
10
10
65
12
I/O0 to I/O15
®
A0 to A8
Pin(s)
UCAS
LCAS
GND
RAS
V
WE
OE
CC
–35
160
2.0
35
18
10
10
70
14
Column address strobe, upper byte
Column address strobe, lower byte
Copyright © Alliance Semiconductor. All rights reserved.
Power (+5V
Row address strobe
Read/write control
AS4C256K16FO
Address inputs
Output enable
Input/output
Description
bb
Ground
generator
140
–50
2.0
50
25
10
10
85
25
10%)
P. 1 of 25
Unit
mA
mA
ns
ns
ns
ns
ns
ns

Related parts for AS4C256K16F0-25JC

AS4C256K16F0-25JC Summary of contents

Page 1

Features • Organization: 262,144 words × 16 bits • High speed - 25/30/35/50 ns RAS access time - 12/16/18/25 ns column address access time - 7/10/10/10 ns CAS access time • Low power consumption - Active: 770 mW max (ASAS4C256K16FO-50) ...

Page 2

... Functional description The AS4C256K16FO is a high-performance 4 megabit CMOS Dynamic Random Access Memory (DRAM) device organized as 262,144 words × 16 bits. The AS4C256K16FO is fabricated with advanced CMOS technology and designed with innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. ...

Page 3

Absolute maximum ratings Parameter Input voltage Output voltage Power supply voltage Operating temperature Storage temperature (plastic) Soldering temperature time Power dissipation Short circuit output current Latch-up current Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent ...

Page 4

AC parameters common to all waveforms Standard Symbol Parameter t Random read or write cycle time RC t RAS precharge time RP t RAS pulse width RAS t CAS pulse width CAS t RAS to CAS delay time RCD t ...

Page 5

Write cycle Standard Symbol Parameter t Column address setup time ASC t Column address hold time CAH t Column address hold time to RAS AWR t Write command setup time WCS t Write command hold time WCH t Write command ...

Page 6

Refresh cycle Standard Symbol Parameter t CAS setup time (CAS-before-RAS) CSR t CAS hold time (CAS-before-RAS) CHR t RAS precharge to CAS hold time RPC CAS precharge time t CPT (CAS-before-RAS counter test) Output enable Standard Symbol Parameter t RAS ...

Page 7

Key to switching waveforms Rising input Read cycle waveform RAS t CRP UCAS, LCAS t ASR Address Row Address WE OE I/O 4/11/01; V.0.9.1 ® Falling input RAS t t RCD RSH t CSH t t CAH ...

Page 8

Upper byte read waveform RAS t CRP UCAS t CRP LCAS t RAH t RAD t ASR Row Address WE OE Upper I/O Lower I/O Lower byte read waveform RAS LCAS UCAS t RAH t RAD t ASR Row Address ...

Page 9

Early write waveform RAS t CRP UCAS, LCAS t ASR Row Address Address WE OE I/O 4/11/01; V.0.9.1 ® RAS t CSH t RSH t t RCD CAS t AWR t t RAD RAL t ASC t ...

Page 10

Upper byte early write waveform RAS t ASR t RAH Row Address Address t CRP UCAS t CRP LCAS WE OE Upper I/O Lower I/O 4/11/01; V.0.9.1 ® RAS t AWR t RAD t RAL Column Address ...

Page 11

Lower byte early write waveform RAS t ASR Address Row Address t CRP UCAS t CRP LCAS WE OE Upper I/O Lower I/O Write waveform RAS t CRP UCAS, LCAS t ASR Row Address Address WE OE I/O 4/11/01; V.0.9.1 ...

Page 12

Upper byte write waveform RAS t ASR Row Address Address t CRP UCAS t CRP LCAS WE OE Upper I/O Lower I/O 4/11/01; V.0.9.1 ® RAS t t RAD RAL t AWR t RAH Column Address t ...

Page 13

Lower byte write waveform RAS t ASR t RAH Address Row Address t CRP LCAS t CRP UCAS WE OE Upper I/O Lower I/O Read-modify-write waveform RAS t CRP UCAS, LCAS t RAD t ASR Row Address Address WE OE ...

Page 14

Upper byte read-modify-write waveform RAS t t CRP UCAS t CRP LCAS t RAD t ASR t RAH Address Row t RCS WE OE Upper Input Upper Output Lower Input Lower Output 4/11/01; V.0.9.1 ® t RWC t RAS t ...

Page 15

Lower byte read-modify write waveform RAS t CRP UCAS t t CRP LCAS t RAD t t ASR ACS t RAH Address Row t RCS WE OE Upper Input Upper Output Lower Input Lower Output 4/11/01; V.0.9.1 ® t RWC ...

Page 16

Fast page mode read waveform RAS t t CRP RCD UCAS, LCAS t RAD t ASR Row Address RAC I/O Fast page mode byte read waveform RAS RCD CRP UCAS t CRP LCAS t ...

Page 17

Fast page mode early write waveform t RAS t t CRP RCD UCAS, LCAS t t ASR RAD Row address Address I/O Fast page mode byte early write waveform RAS t CSH t t CRP RCD ...

Page 18

Fast page mode read-modify-write waveform RAS t CSH t RCD UCAS, t LCAS RAD t t ASR RAH Row Ad Col Ad Address t RCS WE t OEA OE t RAC I/O CAS-before-RAS refresh waveform t RP RAS t RPC ...

Page 19

Fast page mode byte read-modify-write waveform RAS t CSH t RCD t CRP UCAS LCAS t RAD t RAH t t ASR ASC Address AWD t RCS t RWD OED t DS Upper ...

Page 20

Hidden refresh waveform (read) t RAS RAS t CRP t RCD CAS RAD t RAH t ASR Row Address t RCS RAC t AA I/O Hidden refresh waveform (write) RAS t t CRP RCD ...

Page 21

CAS before RAS refresh counter test waveform RAS UCAS, LCAS Address I I I/O 4/11/01; V.0.9.1 ® t RAS t t CSR CPT t t CHR CAS t RAL t CAH Col Address t ...

Page 22

CAS-before-RAS self refresh cycle t RP RAS t RPC t CP UCAS, LCAS DQ Typical AC and DC characteristics Normalized access time t RAC vs. supply voltage V CC 1.5 1 25°C a 1.3 1.2 1.1 1.0 0.9 ...

Page 23

Typical refresh current I CC3 vs. supply voltage 4.0 4.5 5.0 5.5 6.0 Supply voltage (V) Typical TTL stand-by current I CC2 vs. ambient temperature T a 3.5 3.0 2.5 ...

Page 24

Package dimensions 4443424140393837363534333231 40/44-pin TSOP 91011121314 40-pin SOJ Pin Capacitance Parameter Input capacitance I/O capacitance 4/11/01; V.0.9.1 ® ...

Page 25

... Ordering codes –25 ns AS4C256K16F0-25JC AS4C256K16F0-30JC AS4C256K16F0-25JI AS4C256K16F0-30JI AS4C256K16F0-25TC AS4C256K16F0-30TC AS4C256K16F0-25TI AS4C256K16F0-30TI Part numbering system AS4C 256K16F0 DRAM prefix Device number RAS access time 4/11/01; V.0.9.1 ® –30 ns –35 ns AS4C256K16F0-35JC AS4C256K16F0-35JI AS4C256K16F0-35TC AS4C256K16F0-35TI –XX X Package Plastic SOJ, 400 mil, 40-pin T = TSOP II, 400 mil, 40/44-pin ...

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