U3741BM-M2FLG3 TEMIC [TEMIC Semiconductors], U3741BM-M2FLG3 Datasheet - Page 8

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U3741BM-M2FLG3

Manufacturer Part Number
U3741BM-M2FLG3
Description
UHF ASK/FSK Receiver
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
Pin MODE can now be set in accordance with the desired
clock cycle T
relevant parameters:
D
D
D
D
D
Most applications are dominated by two transmission
frequencies: f
f
of all T
characteristics display three conditions for each parame-
ter.
D
D
D
The clock cycle of some function blocks depends on the
selected baud rate range (BR_Range) which is defined in
the OPMODE register. This clock cycle T
by the following formulas for further reference:
BR_Range = BR_Range0: T
Polling Mode
According to figure 5 the receiver stays in polling mode
in a continuous cycle of three different modes. In sleep
mode the signal processing circuitry is disabled for the
time period T
I
processing circuits are enabled and settled. In the
following bitcheck mode, the incoming data stream is
analyzed bit by bit contra a valid transmitter signal. If no
valid signal is present, the receiver is set back to sleep
mode after the period T
by check as it is a statistical process. An average value for
T
T
The average current consumption in polling mode is
U3741BM
8 (25)
Send
S
Bitcheck
Startup
= I
Timing of the polling circuit including bitcheck
Timing of the analog and digital signal processing
Timing of the register programming
Frequency of the reset marker
IF filter center frequency (f
Application USA
(f
Application Europe
(f
Other applications
(T
Pin MODE. The electrical characteristic is given as a
function of T
XTO
XTO
= 433.92 MHz in Europe. In order to ease the usage
Soff
Clk
and T
. During the start-up period, T
is dependent on f
is given in the electrical characteristics. During
Clk
= 4.90625 MHz, MODE = L, T
= 6.76438 MHz, MODE = H, T
-dependent parameters on this electrical
Clk
Bitcheck
Send
BR_Range1: T
BR_Range2: T
BR_Range3: T
Sleep
. T
Clk
= 315 MHz is mainly used in USA,
Clk
).
the current consumption is I
while consuming low current of
controls the following application-
Bitcheck
XTO
XClk
XClk
XClk
XClk
IF0
. This period varies check
and on the logical state of
)
= 8 T
= 4 T
= 2 T
= 1 T
Preliminary Information
Startup
Clk
Clk
XClk
Clk
Clk
Clk
Clk
= 2.0383 s)
= 2.0697 s)
, all signal
is defined
S
= I
Son
.
dependent on the duty cycle of the active mode and can
be calculated as:
I
During T
a transmitter signal. To guarantee the reception of a
transmitted command the transmitter must start the
telegram with an adequate preburst. The required length
of the preburst is dependent on the polling parameters
T
connected C (T
actual bitrate and the number of bits (N
tested.
The following formula indicates how to calculate the
preburst length.
T
Sleep Mode
The length of period T
Sleep of the OPMODE register, the extension factor
XSleep, according to table 10, and the basic clock cycle
T
T
In US- and European applications, the maximum value of
T
resolution is about 2 ms in that case. The sleep time can
be extended to almost half a second by setting XSleep
to 8. XSleep can be set to 8 by bit XSleep
XSleep
described below:
XSleep
The sleep time is always extended.
XSleep
The extended sleep time is used as long as every bitcheck
is OK. If the bitcheck fails once, this bit is set back to 0
automatically resulting in a regular sleep time. This
functionality can be used to save current in presence of a
modulated disturber similar to an expected transmitter
signal. The connected
condition. If the disturber disappears, the receiver
switches back to regular polling and is again sensitive to
appropriate transmitter signals.
According to table 7, the highest register value of Sleep
sets the receiver into a permanent sleep condition. The
receiver remains in that condition until another value for
Sleep is programmed into the OPMODE register. This
function is desirable where several devices share a single
data line.
Spoll
Sleep
Preburst
Clk
Sleep
Sleep
. It is calculated to be:
+
, T
= Sleep
is about 60 ms if XSleep is set to 1. The time
Temp
Std
Temp
I
w
Soff
Sleep
Startup
= 1 implies the standard extension factor.
T
= 1 implies the temporary extension factor.
resulting in a different mode of action as
Sleep
and T
T
T
, T
Sleep
Sleep
Start, C
X
+ T
Bitcheck
Sleep
Startup
)
)
Startup
Sleep
I
). T
T
Son
Startup
C is activated rarely in that
the receiver is not sensitive to
1024
and the startup time of a
Bitcheck
+ T
is defined by the 5-bit word
(T
)
Bitcheck
Startup
T
thus depends on the
T
Bitcheck
Rev. A1, 15-Oct-98
Clk
)
+ T
T
Bitcheck
Bitcheck)
Start_
Std
or by bit
m
C
) to be

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