HT48RA3 HOLTEK [Holtek Semiconductor Inc], HT48RA3 Datasheet

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... Bit manipulation instruction 16-bit table read instruction 63 powerful instructions All instructions in one or two machine cycles 28-pin SKDIP/SOP package universal remote controller (URC). A HALT feature is in- cluded to reduce power consumption. The data ROM can be used to store codes of remote control. 1 HT48RA3 May 12, 2003 ...

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... The pull-high resistor of this input/output line is also optional. PF0 is pin shared with the INT function pin. Positive power supply OSC1, OSC2 are connected network or Crystal (determined by option) for the internal system clock. In the case of RC operation, OSC2 is the output terminal for 1/4 system clock. 2 HT48RA3 May 12, 2003 ...

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... DD V =0. Test Conditions Min. V Conditions DD 3V 400 3V 50% duty Without WDT prescaler 11.5 /4) 3V Without WDT prescaler 1 Power-up, reset or wake-up from HALT HT48RA3 Ta=25 C Typ. Max. Unit ...

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... Program Counter S14~S0: Stack register bits @7~@0: PCL bits 4 HT48RA3 * May 12, 2003 ...

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... If the stack is full and a non-masked interrupt takes place, the interrupt request flag will be recorded but the acknowledge signal will be inhibited. When the stack Table Location * Table location @7~@0: Table pointer bits 5 HT48RA3 * May 12, 2003 ...

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... The accumulator is closely related to ALU operations also mapped to location of the data memory and can carry out immediate data operations. The data move- Rev. 1.20 HT48RA3 RAM mapping ment between two data memory locations must pass through the accumulator. Arithmetic and Logic Unit - ALU This circuit performs 8-bit arithmetic and logic opera- tions ...

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... When the interrupt is enabled, the stack is not full and the T0F bit is set, a subroutine call to location 08H will occur. The related interrupt request flag (T0F) will be reset and the EMI bit cleared to disable further in- terrupts. Function Status register 7 HT48RA3 May 12, 2003 ...

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... It is, therefore, not suitable for timing sensitive operations where an accurate oscillator frequency is desired. If the crystal oscillator is used, a crystal across OSC1 and OSC2 is needed to provide the feedback and phase Function INTC register 8 HT48RA3 May 12, 2003 ...

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... The contents of the on chip RAM and registers remain unchanged. WDT and WDT prescaler will be cleared and re- counted again (if the WDT clock is from the WDT os- cillator). All of the I/O ports maintain their original status. The PD flag is set and the TO flag is cleared. Watchdog Timer 9 HT48RA3 Division Ratio 1:1 1:2 1:4 1:8 1:16 1:32 1:64 ...

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... WDT wake-up HALT Note: u stands for unchanged Rev. 1.20 HT48RA3 To guarantee that the system oscillator is started and stabilized, the SST (System Start-up Timer) provides an extra-delay of 1024 system clock pulses when the sys- tem reset (power-up, WDT time-out or RES reset) or the system awakes from the HALT state. ...

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... HT48RA3 WDT Time-out (HALT)* uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu 0000H uuuu uuuu --uu uuuu uuuu uuuu --11 uuuu --uu -uuu uuuu uuuu uu-u uuuu ...

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... Timer/Event Counter 0 starts counting not according to the logic level but according to the transi- tion edges. In the case of counter overflows, the counter Rev. 1.20 HT48RA3 0 is reloaded from the Timer/Event Counter 0 preload register and issues the interrupt request just like the other two modes. ...

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... In the case of Timer/Event Counter 1 OFF condition, writing data to the Timer/Event Counter 1 preload regis- ter will also load the data to Timer/Event Counter 1. But if the Timer/Event Counter 1 is turned on, data written to the Timer/Event Counter 1 will only be kept in the Timer/Event Counter 0 Timer/Event Counter 1 13 HT48RA3 May 12, 2003 ...

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... The input paths (pad state or latches) of read-modify-write instructions are dependent on the control register bits. For output function, CMOS is the only configuration. These control registers are mapped to locations 13H, 15H, 17H and 1DH. Input/output ports 14 HT48RA3 May 12, 2003 ...

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... PC pull-high enable or disable PA pull-high enable or disable: Byte option PF pull-high enable or disable PB pull-high (PB0~PB3, PB4~PB7) enable or disable: Nibble option PB0 or PFD CLR WDT instructions System oscillators crystal WDT enable or disable WDT clock source: WDTOSC or system clock/4 O PFD 1 PFD 15 HT48RA3 May 12, 2003 ...

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... Application Circuits RC Oscillator for Multiple I/O Applications Note: If 400kHz<f <1MHz, C1=C2=300pF, else C1=C2 SYS Rev. 1.20 HT48RA3 Crystal or Ceramic Resonator for Multiple I/O Applications 16 May 12, 2003 ...

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... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.20 Instruction Description 17 HT48RA3 Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 ...

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... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PD are cleared. Otherwise the TO and PD flags remain unchanged. Rev. 1.20 Instruction Description 18 HT48RA3 Flag Cycle Affected 2 None (2) 1 None (2) 1 None ...

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... ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ö 26 HT48RA3 May 12, 2003 ...

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... ACC ¬ ACC ²XOR² x Operation Affected flag(s) TC2 TC1 ¾ ¾ Rev. 1. ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ ¾ ¾ ¾ Ö ¾ ¾ 31 HT48RA3 May 12, 2003 ...

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... Package Information 28-pin SKDIP (300mil) Outline Dimensions Symbol Min. A 1375 B 278 C 125 D 125 295 I 330 0 Rev. 1.20 HT48RA3 Dimensions in mil Nom. Max. 1395 298 135 145 20 70 100 315 375 15 32 May 12, 2003 ...

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... SOP (300mil) Outline Dimensions Symbol Min. A 394 B 290 C 14 697 Rev. 1.20 HT48RA3 Dimensions in mil Nom. Max. 419 300 20 713 104 May 12, 2003 ...

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... Product Tape and Reel Specifications Reel Dimensions SOP 28W (300mil) Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.20 HT48RA3 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 34 May 12, 2003 ...

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... Description W Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.20 HT48RA3 Dimensions in mm 24.0 0.3 12.0 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4.0 0.1 2.0 0.1 10.85 0.1 18.34 0.1 2.97 0.1 0.35 0.01 21.3 35 May 12, 2003 ...

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... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.20 HT48RA3 36 May 12, 2003 ...