HDSP-2301 HP [Agilent(Hewlett-Packard)], HDSP-2301 Datasheet - Page 16

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HDSP-2301

Manufacturer Part Number
HDSP-2301
Description
Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays
Manufacturer
HP [Agilent(Hewlett-Packard)]
Datasheet
Refresh Controller
The REFRESH CONTROLLER
circuit depicted in Figure 4 oper-
ates by interrupting the
microprocessor every two milli-
seconds to request a new block of
display data and column select
data. Display data is loaded from
the data bus into the serial input
of the HDSP-2000 via a 74165 par-
allel in, serial out shift register.
The 74LS293 counter and associ-
ated gates insure that only seven
clock pulses are delivered to the
shift register and the HDSP-2000
for each word loaded. Column
Select data is loaded into a 74174
latch which, in turn, drives the
column switch transistors. The
circuit timing relative to the mi-
croprocessor clock and I/O is
depicted in Figure 5.
The 6800 software necessary to
support this interface is divided
HDSP 2000 CLOCK
Figure 5. REFRESH CONTROLLER Timing
HDSP 2000 DATA
ADDRESS BUS
ADDRESS BUS
DATA BUS
DATA BUS
S/L 74165
S/L 74165
1
2
2
1
ROW 7
ROW 6
into two separate subroutines,
“RFRSH” and “LOAD” (Figure 6).
This approach is desirable to
minimize microprocessor involve-
ment during display refresh. The
subroutine “RFRSH” loads a new
set of decoded display data from
the microprocessor scratchpad
memory into the interface at each
interrupt request. The subroutine
“LOAD” is utilized to decode a
string of 32 ASCII characters into
5 x 7 formatted display data and
store this data in the scratchpad
memory used by “RFRSH”.
Figures 7 and 8 depict two differ-
ent software routines for
interfacing the REFRESH CON-
TROLLER to an 8080A
microprocessor. The two subrou-
tines shown in Figure 7 are
functional replacements for the
6800 program shown in Figure 6.
The programs shown in Figures 6
ROW 5
8080A MICROPROCESSOR TIMING
6800 MICROPROCESSOR TIMING
DATA ENTRY TIMING
ROW 4
ROW 3
and 7 require a 5N byte
scratchpad memory where N is
the display length. The routine in
Figure 8 eliminates this
scratchpad memory by decoding
and loading data each time a new
interrupt request is received.
Because the microprocessor sys-
tem is interrupted every 2 ms,
proper software design is espe-
cially important for the REFRESH
CONTROLLER. The use of the
scratchpad memory significantly
reduces the time required to re-
fresh the display. The fastest
program, shown in Figure 6, uses
in-line code to access data from
the buffer and output it to the dis-
play. This program requires 3.7% +
.50N% of the available micropro-
cessor time for a 1 MHz clock.
The program shown in Figure 7 is
similar to the one shown in Figure
6, except that it uses a program
8
ROW 2
ROW 1
AN1016.05

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