MSM6665C-XX OKI [OKI electronic componets], MSM6665C-XX Datasheet

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MSM6665C-XX

Manufacturer Part Number
MSM6665C-XX
Description
DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT DRIVER
Manufacturer
OKI [OKI electronic componets]
Datasheet
FEDL6665C-02
¡ Semiconductor
¡ Semiconductor
DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT
DRIVER
MSM6665C-xx
GENERAL DESCRIPTION
The MSM6665C-xx is a dot-matrix LCD control driver which has functions of displaying
characters, cursor and arbitrators.
The MSM6665C-xx is provided with a 17-dot common driver, 80-dot segment driver, display
RAM and character ROM, and is controlled with the commands from the serial interface.
The character ROM can change the font data by mask option.
The MSM6665C-02 has standard ROM with 256 different character fonts.
The MSM6665C-xx can drive a variety of LCD panels because the bias voltage, which determines
the LCD driving voltage, can be optionally supplied from the external source.
FEATURES
• Serial interface
• Contains a 17-dot common driver and an 80-dot segment driver.
• Contains ROM with character fonts of (5 x 7 dots) x 256.
• A built-in RC oscillator circuit.
• Provided with 80-dot arbitrators.
• Switchable between 1/9 duty (1 line; characters + cursor + arbitrator) and 1/17 duty (2 lines;
• Character blink operation can be switched between all-characters lighting-on mode and all-
• SiG C-MOS process
• Arbitrator blink operation can be switched between 5-dot unit mode and 1-dot unit mode.
• Package options :
characters + cursor, 1 line; arbitrator).
characters lighting-off mode.
128-pin plastic QFP (QFP128-P-1420-0.50-K)
Aluminum pad chip
(Product name: MSM6665C-xxGS-K)
(Product name: MSM6665C-xx)
xx indicates code number.
Previous version: Nov. 1997
This version: Aug. 2000
FEDL6665C-02
MSM6665C-xx
1/31

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MSM6665C-XX Summary of contents

Page 1

... The character ROM can change the font data by mask option. The MSM6665C-02 has standard ROM with 256 different character fonts. The MSM6665C-xx can drive a variety of LCD panels because the bias voltage, which determines the LCD driving voltage, can be optionally supplied from the external source. ...

Page 2

... TIMING GENERATION OSC3 SEGMENT DRIVER LATCH SHIFT REGISTER CHARACTER GENERATOR ROM (256x5x7dots FEDL6665C-02 MSM6665C-xx F/F GATE 17D 9D/ RST S I 2/31 ...

Page 3

... S36 S35 27 S34 28 S33 29 S32 30 S31 31 S30 32 S29 33 S28 34 S27 35 S26 36 S25 37 S24 connection 128-Pin Plastic QFP FEDL6665C-02 MSM6665C-xx TEST1 102 OSC3 101 OSC2 100 NC 99 OSC1 RST 95 9D/17D 94 SHT C SS1 ...

Page 4

... –1/5V V –1/ –2/ –2/ –3/ –4/5V V –3/ SS5 SS5 FEDL6665C-02 MSM6665C-xx Rating Unit Applicable pin SS5 +0.3 V All inputs DD 1210 mW C Range Unit Applicable pin ...

Page 5

... –0.5V — 0.5 =0.5V I — = 50mA — = 10mA — =10kW S — FEDL6665C-02 MSM6665C- 8V, Ta=– Applicable pin — OSC1 DD — 0.2V V OSC1 DD — Input pins except OSC1 DD — 0.2V V Input pins except OSC1 DD — 1 ...

Page 6

... IH V IH2 V IL2 DLY * V IH2 V IL2 V IL2 =0.5V OL OSC1 OSC2 C OSC3 FEDL6665C-02 MSM6665C-xx (V =2.5 to 5.5V, Ta=– Min. Max. Unit — 300 200 — — 200 — 200 ns 0 200 200 — 200 — — 100 5 — IH2 ...

Page 7

... Oscillation characteristics 2 (R 1/17 duty =10kW, C=56pF, R variable characteristics =3. =5. Resistance (kW) =10kW, R=66kW, C variable characteristics =3. =5. Capacitance (pF) FEDL6665C-02 MSM6665C-xx f=80kHz Frame cycle ¥ 2=27.2ms 95 f=80kHz Frame cycle ¥ 2=27.2ms 75 7/31 ...

Page 8

... Setting this pin at "L" level during command execution may cause malfunction. • 9D/17D (1/9Duty/1/17Duty) Duty setting input pin. 1/9duty is set if this pin is at "H" level, and 1/17duty at "L" level. Choice depends on the type of panel to be used. If 1/9duty is selected, common outputs C10 to C17 should be set open. FEDL6665C-02 MSM6665C-xx 8/31 ...

Page 9

... GND pin. If the battery is used – pin. [External master clock input] < Oscillation circuit wiring diagram > <Relationship between panel and LCD output> should be set at "H" level connected to the + pin, and V DD FEDL6665C-02 MSM6665C-xx OSC1 80kHz OSC2 OPEN OSC3 OPEN ...

Page 10

... BI DD SS5 –1 SS1 –2 SS2 –3 SS3 –4 SS4 SS5 =V – SS5 –1 SS1 –2 SS2 SS3 –3 SS4 SS5 FEDL6665C-02 MSM6665C-xx 10/31 ...

Page 11

... But, though blinking setting with 1 cursor-on setting is acceptable, blinking does not occur 1/0 X CHB + CSB Sets blink patterns of characters 1/0 ( :chara.) if D0="1" ( :chara.) if D0="0" Operation FEDL6665C-02 MSM6665C- Don't care Comments q n 11/31 ...

Page 12

... When D0 is "1", display data is output via SO pin. When D0 is "0", SO pin goes to high impedance. The D0 status is not changed by Reset inputting. The D0 status is unknown when the system is powered on must be set to "0" or "1" with the command. FEDL6665C-02 MSM6665C-xx Operation 12/31 ...

Page 13

... Command used to increment the value of the address pointer by 1. The pointer is increment by 1 each time this command is executed. The operation set by LOT command is given to the address before being increased by 1 each time this command is execution. level voltage is output on all of pins of both the segment DD FEDL6665C-02 MSM6665C-xx 13/31 ...

Page 14

... D0 is set to "0" after inputting Reset. [D0 = "1"] • Increment (+1) in address pointer When display data or arbitrator data (1-dot unit) is entered or when the following commands are executed, the address pointer is incremented by 1. AINC, CHB, CSC, CSB and CCB. FEDL6665C-02 MSM6665C-xx [D0 = "0"] 14/31 ...

Page 15

... Max=[Master clock cycle Max=[Master clock cycle LSB 17D : Max=[Master clock cycle Max=[Master clock cycle FEDL6665C-02 MSM6665C-xx C/D LSB LSB BUSY BUSY NON-BUSY 15/31 ...

Page 16

... DUTY: (Original clock cycle) x 1088 = Frame cycle ........................... Formula 3 From Formula 2,3 the blink frequency can be calculated. Example) In the original clock 80kHz and 1/17 DUTY specifications Clock cycle Ts=12 From formula 3, Clock cycle Tf=12 Thus, Frame frequency = 73.5 [Hz Blink cycle ............................................. Formula 1.024 [ 1088 = 13.6 [ms] FEDL6665C-02 MSM6665C-xx 16/31 ...

Page 17

... S5n+1 D4 Dummy input is required for serial data D7 through D5. Either "1" or "0" is available for data to be input into D7 through D5. Arbitrator Character 1 Cursor 1 Character 2 Cursor 2 Arbitrator 47 Character 1 15 Cursor Character 2 31 Cursor 2 S5n FEDL6665C-02 MSM6665C-xx 17/31 ...

Page 18

... Set the blink pattern and bank change mode. Set the Load Option. (Blank-code writing and blink-cancellation are executed each time the AINC command is executed.) Input the AINC command to clear the RAM data. Release the Load Option. Display is turned on and the initial screen is displayed. FEDL6665C-02 MSM6665C-xx ) 18/31 ...

Page 19

... Semiconductor Waveforms Applied to LCD 1/17 duty (1/5 bias C17 Sn FEDL6665C-02 MSM6665C- SS1 V SS2 V SS3 V SS4 V SS5 SS1 V SS2 V SS3 V SS4 V SS5 V DD ...

Page 20

... Semiconductor 1/9duty (1/4 bias FEDL6665C-02 MSM6665C- SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 V SS5 ...

Page 21

... Semiconductor 1/17 duty (1/4 bias C17 lighting on = lighting off FEDL6665C-02 MSM6665C- SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 V SS5 V DD ...

Page 22

... FEDL6665C-02 MSM6665C-xx 30H : 0 38H : 8 31H : 1 39H : 9 32H : 2 3AH : : 33H : 3 3BH : ; 34H : 4 3CH : < 35H : 5 3DH : = 36H : 6 3EH : > 37H : 7 3FH : ? 22/31 ...

Page 23

... Y 61H : a 69H : i 5AH : Z 62H : b 6AH : j 5BH : [ 63H : c 6BH : k 5CH : \ 64H : d 6CH : l 5DH : ] 65H : e 6DH : m 5EH : ^ 66H : f 6EH : n 5FH : _ 67H : g 6FH : o FEDL6665C-02 MSM6665C-xx 78H : x 70H : p 79H : y 71H : q 7AH : z 72H : r 7BH : { 73H : s 7CH : | 74H : t 7DH : } 75H : u 7EH : ~ 76H : v 7FH : 77H : w 23/31 ...

Page 24

... Semiconductor FEDL6665C-02 MSM6665C-xx 24/31 ...

Page 25

... Semiconductor FEDL6665C-02 MSM6665C-xx 25/31 ...

Page 26

... Cursor-contained ( dots)16-character x 2-line LCD panel 17 dots COM C1 - C17 V DD MSM6665C-xx V SS1 V SS2 LCD bias V SS3 V SS4 V SS5 9D/ 17D Vss 1~3 TEST PORT 80 dots SEG S1 - S80 10kW OSC1 62kW OSC2 56pF OSC3 RST D SHT FEDL6665C-02 MSM6665C-xx OSC1 80kHz OSC2 or OPEN OPEN OSC3 26/31 ...

Page 27

... FEDL6665C-02 MSM6665C- Pad Name 533 –2332 SS1 CS 683 –2332 C/D 833 –2332 SI 983 –2332 SHT 1133 –2332 –2332 9D/17D 1283 RST –2332 1433 – ...

Page 28

... FEDL6665C-02 MSM6665C-xx Pad Name S35 –818 2332 S34 –968 2332 S33 –1118 2332 S32 –1268 2332 S31 –1418 2332 S30 –1568 ...

Page 29

... S33 83 54 124 S32 84 55 125 S31 85 56 126 S30 86 57 127 S29 87 58 128 S28 S27 S26 90 FEDL6665C-02 MSM6665C-xx Chip Package Symbol Pin Pad Pin 3 S25 S24 S23 S22 S21 S20 S19 ...

Page 30

... Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating (≥5 mm) Package weight (g) 1.19 TYP. Rev. No./Last Revised 4/Nov. 28, 1996 FEDL6665C-02 MSM6665C-xx (Unit : mm) 30/31 ...

Page 31

... No part of the contents contained herein may be reprinted or reproduced without our prior permission. 9. MS-DOS is a registered trademark of Microsoft Corporation. Copyright 2000 Oki Electric Industry Co., Ltd. Printed in Japan FEDL6665C-02 MSM6665C-xx 31/31 ...

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