IC62LV256 ICSI [Integrated Circuit Solution Inc], IC62LV256 Datasheet - Page 2

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IC62LV256

Manufacturer Part Number
IC62LV256
Description
32K x 8 Low Power SRAM with 3.3V
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet

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IC62LV256
FEATURES
• Access time: 45, 70, 100 ns
• Low active power: 70 mW
• Low standby power
• Fully static operation: no clock or refresh
• TTL compatible inputs and outputs
• Single 3.3V power supply
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
32K x 8 LOW VOLTAGE STATIC RAM
— 60 µW CMOS standby
required
FUNCTIONAL BLOCK DIAGRAM
I/O0-I/O7
A0-A14
VCC
GND
WE
CE
OE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
DESCRIPTION
The
static RAM. It is fabricated using
CMOS double-metal technology.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
20 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE) input and an active LOW Output Enable (OE)
input. The active LOW Write Enable (WE) controls both writing
and reading of the memory.
The IC62LV256 is pin compatible with other 32K x 8 SRAMs
in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1
packages.
ICSI
IC62LV256 is a low power, 32, 768-word by 8-bit
MEMORY ARRAY
COLUMN I/O
256 X 1024
Integrated Circuit Solution Inc.
ICSI
's high-performance
ALSR007-0A 10/5/2001

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