PG12864LRU POWERTIP [Powertip Technology], PG12864LRU Datasheet
PG12864LRU
Available stocks
Related parts for PG12864LRU
PG12864LRU Summary of contents
Page 1
... Customer Model Type Sample Code Mass Production Code Edition Customer Sign 【產品規格書】 ： ： ： PG12864LRU-ORA-H-S0 ： ： Sales Sign Approved By LCD Module 0 Prepared By NO.PT-R-003-4 ...
Page 2
... SPECIFICATIONS 1.1 Features 1.2 Mechanical Specifications 1.3 Absolute Maximum Ratings 1.4 DC Electrical Characteristics 1.5 Optical Characteristics 1.6 Backlight Characteristics 2. MODULE STRUCTURE 2.1 Counter Drawing 2.2 Interface Pin Description 2.3 Timing Characteristics 2.4 Display Command 3. RELIABILITY 3.1 Content of Reliability Test POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 CONTENTS ...
Page 3
... OPR T - STG Symbol Condition = -20 C POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 Min. Max. Unit -20 +70 C -30 + %RH Min. Typ. Max. - 5 ...
Page 4
... Note : Note 4: Definition of response time Brightness (reflection unselected dot Note: Measured with a transflective LCD panel which is displayed Operating voltage OPR t : Response time (rise) r POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 Typ. Max Reference - - Notes Note 3 140ms 200ms Note 4 300ms 500ms ...
Page 5
... Condition V I =80mA = =80mA =80mA UE F Yellow Green 17 LCD 18 MODULE POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 Min. Max. Unit - 200 0. Min. Typ. Max. Unit 4.0 4.2 4 ...
Page 6
... POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 ...
Page 7
... Data write (write data to the module at “L”) Data read (read data from the module at “L”) Data bus Power supply LED backlight (+) Power supply LED backlight (-) 20K V SS POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 Function ) SS 2 LCD MODULE 3 1 ...
Page 8
... CSB RS RS RDB RDB Write timing CSB RS WRB tAS8 tAS8 tRDW8 tRDW8 tRDD8 tRDD8 tAS8 tWRW8 tDS8 POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 tAH8 tAH8 tRDH8 tRDH8 tCYC8 tCYC8 tAH8 tDH8 tCYC8 ...
Page 9
... CL=15pF tRDH8 tr,tf Symbol Mesauring condition MIN MAX Unit tAH8 tAS8 tCYC8 tRDW8 tWRW8 tDS8 tDH8 tRDD8 CL=15pF tRDH8 tr,tf NO.PG12864LRU-ORA-H Rev:0 (VDD=2.7 to 5.5V,Ta=-30 to +85℃) Appllcable pin 60 ns CSB 450 ns RDB 270 ns WRB 100 ns 100 ...
Page 10
... POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 ...
Page 11
... Symbol Mesauring condition MIN MAX Unit tCYCS tSHW tSLW tASS tAHS tDSS tDHS tCSS tCSH tr,tf POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 tCSH tAHS (VDD=2.4~5.5V,Ta=-30 to +85℃) Appllcable pin 1000 ns SCL 400 ns 400 ...
Page 12
... AX3 AX2 Data Codes (7-3~7-16 Display RAM write data Display RAM read data AX3 POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev AX1 AX0 AX2 AX1 AX0 ...
Page 13
... POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 ...
Page 14
... LY3 ※ LA2 LA1 LA0 LINE ADDRESS POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev AY2 AY1 AY0 AY6 AY5 AY4 LY2 LY1 LY0 ※ LA5 LA4 ...
Page 15
... DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN ※ LA2 LA1 LA0 LINE ADDRESS Second Third 64-th Line Line POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev ※ Frist Second Line Line ...
Page 16
... POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 ...
Page 17
... DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN SHIFT The terminals are specified VSS level. The terminals are specified VSS level ※ LH155BA5 VD POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev SEGMENT ALLON ON/OFF ※ ...
Page 18
... D7(MSB) D0(LSB) 1 H0E D3(MSB) When REF=”1”,please set X address of Segment Display Circuits like below. 00H->0FH 01H->0EH POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev REV NLIN INTERNAL ACCESS X ADDRESS D7-D0 (LSB) ...
Page 19
... DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN SWAP=”0” ※ SELECTION OF INCREMENT TIMING POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 SWAP=”1” AIM AY1 AX1 REFERENCE <1> <2> Graphic ...
Page 20
... REF=”0” (normal output) 00H 0FH (X address) vary in the above loops. •At REF=”1” (reverse output) 0FH 00H POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 0FH 00H 00H 3FH 00H 3FH (Y address) 00H 3FH REFERENCE < ...
Page 21
... The internal bias value for the Graphic display can be set by this command. BIAS=”0”: 1/9 bias BIAS=”1”: 1/7 bias (Bias value for the Segment Display is 1/3 Fixed) DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN address) BIAS POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev HALT PON ACL ...
Page 22
... DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN MSS V0/SV0 0 Smaller 1 Larger SEGPON DU1 BOOST VOLTAGE LEVEL PROHIBITION 3 TIMES 2 TIMES PROHIBITION POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev …… LSB ※ EXA ICON DU0 BS1 BS0 ...
Page 23
... DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN DUTY RATIO 1/64 1/48 1/32 1/ ※ RA3 ※ ※ ※ POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev ※ ※ RA2 RA1 RA0 Internal register read data ...
Page 24
... CSB CSB RS CSB RS 80-family WRB RDB POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 M86 SDA SCL Data M86 - - SDA SCL - RDB WRB Data RDB WRB FUNCTION Read internal register Write internal register ...
Page 25
... MPU, the data are temporally held in the bus holder before they are written by the time of DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN th serial clock , the serial data is converted into 8-bit POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 valid ...
Page 26
... Addresses for Read (0.2~E[hex])are allotted to each internal register. In reading the internal registers, the addresses of internal registers allotted to read are written in the register Read and then are read. DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN n *** Data Read Read n address n n+1 n+2 n n+1 n+2 POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 n+1 n+2 Data Read Data Read n+1 address n+2 address n+3 n+4 n+3 n+4 ...
Page 27
... LP signals. DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN n M Internal For Register Address set Register Data Read POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev Internal Address set Register Data Read line ...
Page 28
... Normal display (REV=0) : RAM data=”0” not lighted • Reverse display (REV=1) : RAM data=”0” lighted DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN RAM data=”1” lighted RAM data=”1” not lighted POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 ...
Page 29
... … … POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 Common Output LINE address 00H COM0 01H COM1 02H COM2 03H COM3 04H ...
Page 30
... Display Data Latching Circuit temporary latches display data that is output display data to LCD driver circuit from Display RAM every one common period. Normal display /reverse display, display ON/OFF, and display all on command are operated by controlling data in the latch. And no data within Display RAM changes. DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN POWERTIP TECHNOLOGY CORPORATION NO.PG12864LRU-ORA-H Rev:0 ...
Page 31
... Endurance test applying the low and high temperature cycle. -25℃ → 25℃ → 75℃ 30min ← 5min ← 30min 1 cycle POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 Test Condition 70℃ 100 hrs -30℃ 100 hrs 70℃ 100 hrs -20℃ ...
Page 32
... POWERTIP TECHNOLOGY CORPORATION DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN NO.PG12864LRU-ORA-H Rev:0 ...