ZADCS1042IS16T ZMDI, ZADCS1042IS16T Datasheet - Page 15

• Manufacturer Part Number: ZADCS1042IS16T
• Description: Analog to Digital Converters - ADC ADC
• Manufacturer: ZMDI

Specifications of ZADCS1042IS16T

• Product Category: Analog to Digital Converters - ADC
• Rohs: yes
• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 250 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: 61 dB
• Interface Type: Microwire, QSPI, SPI
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-16
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 25 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

2
2.1.
The ZADCS10x2 family is a set of classic successive approximation register (SAR) type converters. The
architecture is based on a capacitive charge redistribution DAC merged with a resistor string DAC building a
hybrid converter with excellent monotonicity and DNL properties. The Sample & Hold function is inherent to
the capacitive DAC. This avoids additional active components in the signal path that could distort the input
signal or introduce errors.
All devices in the ZADCS10x2 family build on the same converter core and differ only in the number of input
channels and the availability of an internal reference voltage generator. The ZADCS10x2V versions are
equipped with a highly accurate internal 1.25V bandgap reference which is available at the VREFADJ pin. The
bandgap voltage is further amplified by an internal buffer amplifier to 2.50V that is available at pin VREF. All
other versions come without the internal reference and the internal buffer amplifier. They require an external
reference supplied at VREF, with the benefit of considerably lower power consumption.
A basic application schematic for ZADC1082V is shown in Figure 4, for ZADCS1082 in Figure
ZADCS1082V can also be operated with an external reference, if VREFADJ is tied to VDD.
Figure 4: Basic application schematic for ZADCS1082V
Table 5: Channel selection in Single Ended Mode
Data Sheet
October 12, 2011
A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM
0
1
0
1
0
1
0
1
ZADCS1082/1042/1022
10-Bit, 250ksps, ADC Family
≥ 4.7µF
0
0
0
0
1
1
1
1
Detailed Description
General Operation
0
0
1
1
0
0
1
1
Single-ended or differential
analog inputs, 0V … +2.5V
10
1
2
3
4
5
6
7
8
9
IN+
nCS
DIN
DGND
AGND
V
COM
CH0
CH1
CH4
CH5
REF
ZADCS1082V
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
IN+
µC
IN+
nSHDN 17
V
SSTRB 19
DOUT 18
SCLK 20
REFADJ
VDD 16
CH2 14
CH3 13
CH6 12
CH7 11
IN+
15
IN+
47nF
IN+
IN+
+2.7V to 5.25V
0.1µF
IN+
IN-
IN-
IN-
IN-
IN-
IN-
IN-
IN-
10µF
Table 6: Channel selection in Differential Mode
Figure 5: Basic application schematic for ZADCS1082
A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7
0
0
0
0
1
1
1
1
≥ 4.7µF
0
0
1
1
0
0
1
1
Single-ended or differential
0
1
0
1
0
1
0
1
analog inputs, 0V … +V
10
1
2
3
4
5
6
7
8
9
IN+
IN-
nCS
DIN
DGND
AGND
V
COM
CH0
CH1
CH4
CH5
REF
ZADCS1082
IN+
IN-
µC
SSTRB 19
nSHDN 17
IN+
DOUT 18
IN-
SCLK 20
VDD 16
CH2 14
CH3 13
CH6 12
CH7 11
n.c. 15
IN+
IN-
REF
IN+
IN-
IN+
IN-
+2.7V to 5.25V
0.1µF
IN+
IN-
15 of 26
IN+
IN-
10µF
5.