MAX1157BEUI+ Maxim Integrated, MAX1157BEUI+ Datasheet - Page 7

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MAX1157BEUI+

Manufacturer Part Number
MAX1157BEUI+
Description
Analog to Digital Converters - ADC 14-Bit 135ksps 4.2V Precision ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1157BEUI+

Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
14 bit
Input Type
Single-Ended
Snr
85 dB
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-28
Maximum Power Dissipation
1026 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
The MAX1157/MAX1159/MAX1175 use a successive-
approximation (SAR) conversion technique with an
inherent track-and-hold (T/H) stage to convert an analog
input into a 14-bit digital output. Parallel outputs provide
a high-speed interface to microprocessors (µPs). The
Functional Diagram at the end of the data sheet shows a
simplified internal architecture of the MAX1157/
MAX1159/MAX1175. Figure 3 shows a typical applica-
tion circuit for the MAX1157/MAX1159/MAX1175.
The MAX1157/MAX1159/MAX1175 have an input scaler
which allows conversion of true bipolar input voltages
and input voltages greater than the power supply, while
operating from a single +5V analog supply. The input
scaler attenuates and shifts the analog input to match
the input range of the internal DAC. The MAX1157 has
a unipolar input voltage range of 0 to +10V. The
21, 22
PIN
15
16
17
18
19
20
23
24
25
26
27
28
14-Bit, 135ksps, Single-Supply ADCs with
REFADJ
RESET
NAME
DGND
DV
_______________________________________________________________________________________
N.C.
REF
CS
D0
D1
D2
D3
D4
D5
DD
Detailed Description
Reference Buffer Output. Bypass REFADJ with a 0.1µF capacitor to AGND for internal reference
mode. Connect REFADJ to AV
Reference Input/Output. Bypass REF with a 10µF capacitor to AGND. REF is the external reference
input when in external reference mode.
Reset Input. Logic high resets the device.
Convert Start. The first falling edge of CS powers up the device and enables acquisition when R/C
is low. The second falling edge of CS starts conversion. The third falling edge of CS loads the result
onto the bus when R/C is high.
Digital Ground
Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
No Connection. Make no connection to these pins.
Three-State Digital Data Output (LSB)
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Converter Operation
Analog Input
Input Scaler
Bipolar Analog Input Range
DD
to select external reference mode.
MAX1175 input voltage range is ±5V while the
MAX1159 input voltage range is ±10V. Figure 4 shows
the equivalent input circuit of the MAX1157/
MAX1159/MAX1175. This circuit limits the current going
into or out of AIN to less than 1.8mA.
Figure 1. Load Circuits
D0–D13
1mA
FUNCTION
A)
HIGH-Z TO V
V
V
OL
OH
TO V
TO HIGH-Z
Pin Description (continued)
DGND
OH
, AND
OH
,
C
LOAD
= 20pF
D0–D13
B)
HIGH-Z TO V
V
V
OH
OL
TO HIGH-Z
TO V
1mA
OL
, AND
OL
,
DV
DD
C
DGND
LOAD
= 20pF
7

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