M4A3-64/64-12VI Lattice, M4A3-64/64-12VI Datasheet - Page 4

• Manufacturer Part Number: M4A3-64/64-12VI
• Description: CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
• Manufacturer: Lattice

Specifications of M4A3-64/64-12VI

• Memory Type: EEPROM
• Number Of Macrocells: 64
• Maximum Operating Frequency: 83.3 MHz
• Delay Time: 5 ns
• Number Of Programmable I/os: 97
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Number Of Product Terms Per Macro: 20
• Factory Pack Quantity: 450
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

The ispMACH 4A family offers 20 density-I/O combinations in Thin Quad Flat Pack (TQFP), Plastic
Quad Flat Pack (PQFP), Plastic Leaded Chip Carrier (PLCC), Ball Grid Array (BGA), fine-pitch BGA
(fpBGA), and chip-array BGA (caBGA) packages ranging from 44 to 388 pins (Table 3). It also offers I/O
safety features for mixed-voltage designs so that the 3.3-V devices can accept 5-V inputs, and 5-V devices
do not overdrive 3.3-V inputs. Additional features include Bus-Friendly inputs and I/Os, a programmable
power-down mode for extra power savings and individual output slew rate control for the highest speed
transition or for the lowest noise transition.
4
44-pin PLCC
44-pin TQFP
48-pin TQFP
100-pin TQFP
100-pin PQFP
100-ball caBGA
144-pin TQFP
144-ball fpBGA
208-pin PQFP
256-ball fpBGA
256-ball BGA
388-ball fpBGA
44-pin PLCC
44-pin TQFP
48-pin TQFP
100-pin TQFP
100-pin PQFP
144-pin TQFP
208-pin PQFP
Package
Package
Table 3. ispMACH 4A Package and I/O Options (Number of I/Os and dedicated inputs in Table)
M4A3-32
M4A5-32
32+2
32+2
32+2
32+2
32+2
32+2
M4A3-64
M4A5-64
32+2
32+2
32+2
64+6
32+2
32+2
32+2
5 V Devices
M4A3-96
M4A5-96
48+8
48+8
ispMACH 4A Family
3.3 V Devices
M4A3-128
M4A5-128
64+6
64+6
64+6
64+6
64+6
M4A3-192
M4A5-192
96+16
96+16
96+16
128+14, 160
128+14, 192
M4A3-256
M4A5-256
128+14
128+14
M4A3-384
160
192
192
M4A3-512
160
192
256