NB7L216MNG ON Semiconductor, NB7L216MNG Datasheet
NB7L216MNG
Specifications of NB7L216MNG
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NB7L216MNG Summary of contents
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NB7L216 2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator with Internal Termination Description The NB7L216 is a differential receiver/driver with high gain output targeted for high frequency applications. The device is functionally equivalent to the NBSG16 but ...
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VTD VTD Table 1. PIN DESCRIPTION Pin Name 1 VTD 2 D LVPECL, CML, LVCMOS, LVDS, LVTTL Input 3 D LVPECL, CML, LVCMOS, LVDS, LVTTL Input 4 VTD 13, 14 ...
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Table 2. ATTRIBUTES ESD Protection Moisture Sensitivity (Note 2) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test. 2. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS (Note 3) Symbol Parameter V Positive ...
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Table 4. DC CHARACTERISTICS, CLOCK INPUTS, RSECL OUTPUTS Symbol Characteristic I Power Supply Current (VTD/VTD EE open) V Output HIGH Voltage OH (Note 5 and 6) V Output LOW Voltage OL (Note 5 and 6) DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (see ...
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Table 5. AC CHARACTERISTICS V Symbol Characteristic V Output Voltage Amplitude (@ V OUTPP (See Figure 4) f Maximum Operating Data Rate DATA |S21| Power Gain GHz |S11| Input Return Loss @ 7 GHz |S22| Output Return ...
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Device DDJ = 1 ps TIME (66 ps/div) Figure 6. Typical Output Waveform at 2.488 Gb/s with 23 PRBS 2 − 400 mV, Input Signal DDJ = 12 ps) INPP Device DDJ =2 ps TIME (37 ps/div) Figure ...
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Table 6. TYPICAL DEVICE S−PARAMETERS S11 Frequency (Hz) dbS11 |S11| íS11 4.97E+08 −45.2 0.005 −88.5 1.02E+09 −30.4 0.030 −134.7 1.51E+09 −36.2 0.015 −146.5 2.00E+09 −27.4 0.042 25.7 2.52E+09 −12.3 0.244 −27.7 3.01E+09 −10.6 0.295 −83.8 3.50E+09 −19.0 0.112 −22.1 4.02E+09 ...
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Figure 12. AC Reference Measurement Q Driver Device Q Figure 13. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices Figure 14. Differential Input Driven ...
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All NB7L216 inputs can accept PECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential input signal (LVDS, PECL, or CML) are minimum input swing and the maximum input swing of 2500 mV. Within these ...
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... LVTTL/ LVCMOS Driver V EE Figure 21. LVCMOS/LVTTL to NB7L216 Interface ORDERING INFORMATION Device NB7L216MN NB7L216MNG NB7L216MNR2 NB7L216MNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ VTD VTD Figure 20. LVDS to NB7L216 Interface ...
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... E2 e 3.25 0.128 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6,362,644. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...