MAX1276EVC16 Maxim Integrated, MAX1276EVC16 Datasheet - Page 14

• Manufacturer Part Number: MAX1276EVC16
• Description: Analog to Digital Converters - ADC 1.8Msps Single-Supply Low-Power True-Differential 12-Bit ADCs with Internal Reference
• Manufacturer: Maxim Integrated

Specifications of MAX1276EVC16

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 1800 KSPs
• Resolution: 12 bit
• Input Type: Differential
• Snr: 70 dB
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Power Dissipation: 1349 mW
• Number Of Converters: 1
• Voltage Reference: 4.096 V

and a trailing zero with the data in MSB-first format.
The MAX1276/MAX1278 can be directly connected
to the TMS320C54_ family of DSPs from Texas
Instruments, Inc. Set the DSP to generate its own
clocks or use external clock signals. Use either the
standard or buffered serial port. Figure 15 shows the
simplest interface between the MAX1276/MAX1278 and
the TMS320C54_, where the transmit serial clock
(CLKX) drives the receive serial clock (CLKR) and
SCLK, and the transmit frame sync (FSX) drives the
receive frame sync (FSR) and CNVST.
1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
Figure 12. SPI/MICROWIRE Serial-Interface Timing—Single Conversion (CPOL = CPHA = 0), (CPOL = CPHA = 1)
Figure 13. SPI/MICROWIRE Serial-Interface Timing—Continuous Conversion (CPOL = CPHA = 0), (CPOL = CPHA = 1)
Figure 14. QSPI Serial-Interface Timing—Single Conversion (CPOL = 1, CPHA = 1)
14
CNVST
DOUT
SCLK
CNVST
______________________________________________________________________________________
DOUT
SCLK
HIGH-Z
DSP Interface to the TMS320C54_
CNVST
DOUT
SCLK
1
HIGH-Z
1
0
0
2
0
D11
D11
D10
D11
D10
D10
D9
D9
D9
D8
D8
8
D8
D7
D7
D7
For continuous conversion, set the serial port to trans-
mit a clock, and pulse the frame sync signal for a clock
period before data transmission. The serial-port config-
uration (SPC) register should be set up with internal
frame sync (TXM = 1), CLKX driven by an on-chip clock
source (MCM = 1), burst mode (FSM = 1), and 16-bit
word length (FO = 0).
This setup allows continuous conversions provided that
the data-transmit register (DXR) and the data-receive
register (DRR) are serviced before the next conversion.
Alternatively, autobuffering can be enabled when using
the buffered serial port to execute conversions and
D6
9
D6
D6
D5
D5
D5
D4
D4
D4
D3
D3
D2
D3
D1
D2
D2
14
D0
D1
D1
16
HIGH-Z
D0
D0
16
16
0
HIGH-Z
1
0