MAX1138MEEE+T Maxim Integrated, MAX1138MEEE+T Datasheet - Page 19

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MAX1138MEEE+T

Manufacturer Part Number
MAX1138MEEE+T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1138MEEE+T

Rohs
yes
Number Of Channels
12/6
Architecture
SAR
Conversion Rate
94.4 KSPs
Resolution
10 bit
Input Type
Single-Ended/Differential
Interface Type
I2C
Operating Supply Voltage
4.5 V to 5.5 V
Number Of Converters
1
Voltage Reference
Internal 4.096 V
age. Use separate analog and digital PC board ground
sections with only one star point (Figure 14) connecting
the two ground systems (analog and digital). For lowest
noise operation, ensure the ground return to the star
ground’s power supply is low impedance and as short
as possible. Route digital signals far away from sensi-
tive analog and reference inputs.
High-frequency noise in the power supply (V
influence the proper operation of the ADC’s fast com-
parator. Bypass V
two parallel capacitors, 0.1µF and 4.7µF, located as
close as possible to the MAX1136–MAX1139 power-sup-
ply pin. Minimize capacitor lead length for best supply
noise rejection, and add an attenuation resistor (5Ω) in
series with the power supply, if it is extremely noisy.
Integral nonlinearity (INL) is the deviation of the values on
an actual transfer function from a straight line. This straight
line can be either a best straight-line fit or a line drawn
between the endpoints of the transfer function, once offset
and gain errors have been nullified. The MAX1136–
MAX1139’s INL is measured using the endpoint.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of less than 1 LSB guarantees
no missing codes and a monotonic transfer function.
Figure 13. Bipolar Transfer Function
100 . . . 001
100 . . . 000
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
NOTE: V
OUTPUT CODE
V
COM
IN
= (AIN+) - (AIN-)
V
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
REF
1 LSB =
ZS = 0
-FS =
- FS
FS = V
/ 2
DD
______________________________________________________________________________________
-V
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
1024
REF
V
2
2
REF
REF
to the star ground with a network of
Differential Nonlinearity
INPUT VOLTAGE (LSB)
Integral Nonlinearity
0
Definitions
MAX1136–
MAX1139
+FS - 1 LSB
DD
) could
Aperture jitter (t
the time between the samples.
Aperture delay (t
edge of the sampling clock and the instant when an
actual sample is taken.
For a waveform perfectly reconstructed from digital sam-
ples, the theoretical maximum SNR is the ratio of the full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum ana-
log-to-digital noise is caused by quantization error only
and results directly from the ADC’s resolution (N Bits):
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals.
Figure 14. Power-Supply Grounding Connection
*OPTIONAL
R* = 5Ω
SINAD (dB) = 20
3V OR 5V
V
DD
SNR
MAX[dB]
AJ
Signal-to-Noise Plus Distortion
) is the sample-to-sample variation in
AD
MAX1136–
MAX1139
0.1µF
4.7µF
) is the time between the falling

= 6.02
SUPPLIES
log (SignalRMS/NoiseRMS)
Signal-to-Noise Ratio
dB
GND

N + 1.76
V
LOGIC
Aperture Delay
Aperture Jitter
= 3V/5V
3V/5V
CIRCUITRY
DIGITAL
dB
DGND
GND
19

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