LCMXO2-640HC-4TG100C Lattice, LCMXO2-640HC-4TG100C Datasheet - Page 12

• Manufacturer Part Number: LCMXO2-640HC-4TG100C
• Description: FPGA - Field Programmable Gate Array 640 LUTs 79 IO 3.3V 4 Spd
• Manufacturer: Lattice

Specifications of LCMXO2-640HC-4TG100C

• Rohs: yes
• Number Of Gates: 640
• Embedded Block Ram - Ebr: 18 Kbit
• Number Of I/os: 79
• Maximum Operating Frequency: 269 MHz
• Operating Supply Voltage: 1.14 V to 3.465 V, 2.375 V to 3.465 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100
• Distributed Ram: 5 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 1.84 mA
• Factory Pack Quantity: 90
• User Flash Memory - Ufm: 24 Kbit

3.2 MachXO2 Product Family High Temperature Retention (HTRX) Data
High Temperature Data Retention (HTRX)
The High Temperature Data Retention test measures the Flash cell reliability while the High Temperature
Operating Life test is structured to measure functional operating circuitry failure mechanisms. The High
Temperature Data Retention test is specifically designed to accelerate charge gain on to or charge loss off of
the floating gates in the device’s array. Since the charge on these gates determines the actual pattern and
function of the device, this test is a measure of the reliability of the device in retaining programmed information.
In High Temperature Data Retention, the Flash cell reliability is determined by monitoring the cell margin after
biased static operation at 150°C ambient. Flash cells in the arrays are life tested with half the samples
programmed with a checkerboard pattern and half with checkerboard-not patterns. Prior to data retention
testing all Flash cells are pre-conditioned with 10,000 program/erase cycles.
MachXO2 Data Retention (HTRX) Conditions:
Stress Duration: 168, 500, 1000 hours.
Temperature: 150°C ambient
Stress Voltage MachXO2: V
Method: Lattice Document # 87-101925 and JESD22-A103C / JESD22-A117A
Table 3.2.1: MachXO2 High Temperature Retention Results
* Qual lot #4 includes tunnel oxide (TOX) process splits: nominal, thick and thin TOX respectively. All passed qual.
Note: A detailed MachXO2 Flash Data Retention report is available upon request. Lattice Semiconductor Corp. document #25-106925.
INDEX Return
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-1200ZE
LCMXO2-7000ZE
LCMXO2-7000ZE
Product Name
Package Assembler
MG132
MG132
MG132
MG132
MG132
MG132
TG144
TG144
TG144
CC
=1.26V/ V
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
CCIO
Lot #3
Lot #4
Lot #4
Lot #4
Lot #5
Lot #6
Lot #6
Lot #1
Lot #2
Lot #
=3.47V
MachXO2 Cumulative HTRX Failure Rate = 0 / 554
MachXO2 Cumulative HTRX Device Hours = 714,000
Qty
26*
26*
26*
12
76
80
80
80
80
80
168 Hrs
Result
0
0
0
0
0
0
0
0
0
Lattice Semiconductor Corporation Doc. #25-106923 Rev. F
500 Hrs
Result
0
0
0
0
0
0
0
0
0
1000 Hrs
Result
0
0
0
0
0
0
0
0
0
1500 Hrs
Result
NA
NA
NA
NA
NA
0
0
0
0
Cumulative
120,000
120,000
120,000
120,000
76,000
26,000
26,000
26,000
80,000
Hours