LCMXO2-256ZE-2SG32IES Lattice, LCMXO2-256ZE-2SG32IES Datasheet - Page 49

• Manufacturer Part Number: LCMXO2-256ZE-2SG32IES
• Description: FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
• Manufacturer: Lattice

Specifications of LCMXO2-256ZE-2SG32IES

• Rohs: yes
• Maximum Operating Frequency: 125 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 40 C

LVDS Emulation
MachXO2 devices can support LVDS outputs via emulation (LVDS25E). The output is emulated using complemen-
tary LVCMOS outputs in conjunction with resistors across the driver outputs on all devices. The scheme shown in
Figure 3-1 is one possible solution for LVDS standard implementation. Resistor values in Figure 3-1 are industry
standard values for 1% resistors.
Figure 3-1. LVDS Using External Resistors (LVDS25E)
Table 3-1. LVDS25E DC Conditions
Z
R
R
R
V
V
V
V
Z
I
DC
OUT
OH
OL
OD
BACK
S
P
T
CM
Parameter
8mA
8mA
Note: All resistors are ±1%.
VCCIO = 2.5
VCCIO = 2.5
Emulated
On-chip
Buffer
LVDS
Output impedance
Driver series resistor
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
Over Recommended Operating Conditions
Off-chip
Description
158
158
140
3-10
Zo = 100
100.5
DC and Switching Characteristics
Typ.
1.43
1.07
0.35
1.25
6.03
158
140
100
20
Off-chip
MachXO2 Family Data Sheet
100
Ohms
Ohms
Ohms
Ohms
Ohms
Units
mA
V
V
V
V
On-chip
+
-