92HD90B0X5NLGXYAX IDT, 92HD90B0X5NLGXYAX Datasheet - Page 79

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92HD90B0X5NLGXYAX

Manufacturer Part Number
92HD90B0X5NLGXYAX
Description
Interface - CODECs
Manufacturer
IDT
Datasheet

Specifications of 92HD90B0X5NLGXYAX

Rohs
yes
Part # Aliases
IDT92HD90B0X5NLGXYAX
92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
D5
D4
Field Name
Rsvd2
MonoPwd
FPwd
EPwd
DPwd
CPwd
Reg
Get
Set
7.4.26. AFG (NID = 01h): AnaPort
Byte 4 (Bits 31:24)
Bits
1
Vendor specific D5 power state, only entered once the part is already in D3cold
(this bit must be set before the command to enter D3cold). If set, this bit over-
rides the D4 bit (bit 0). Includes the power savings of D4, but additionally pow-
ers down GPIO pins, the VAG amp, and the HP amps. Exits this power state
via POR or rising edge of Link Reset.
0
Vendor specific D4 power state, only entered once the part is already in D3cold
(this bit must be set before the command to enter D3cold). If the D5 bit (bit 1)
is set, this bit is overridden. Includes the power savings of D3cold, but addi-
tionally powers down the HDA interface (no responses). Exit this power state
via POR or rising edge of Link Reset.
Bits
31:7
Reserved.
6
Power down Mono Output.
5
Power down Port F.
4
Power down Port E.
3
Power down Port D.
2
Power down Port C.
Byte 3 (Bits 23:16)
R/W
RW
RW
R/W
R
RW
RW
RW
RW
RW
FEC00h
Default
0h
0h
Default
0000000h
0h
0h
0h
0h
0h
74
Byte 2 (Bits 15:8)
7EDh
Reset
POR - ELR
POR - ELR
Reset
N/A (Hard-coded)
POR
POR
POR
POR
POR
Byte 1 (Bits 7:0)
7ECh
V 1.2 3/12
92HD98

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