ASI4UC-G1-MT ZMDI, ASI4UC-G1-MT Datasheet - Page 35

• Manufacturer Part Number: ASI4UC-G1-MT
• Description: Interface - Specialized ASI
• Manufacturer: ZMDI

Specifications of ASI4UC-G1-MT

• Product Category: Interface - Specialized
• Rohs: yes
• Product Type: Actuator Sensor Interface IC
• Operating Supply Voltage: 16 V to 33.1 V
• Supply Current: 6 mA
• Maximum Power Dissipation: 850 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Minimum Operating Temperature: - 25 C

3.7. Data Port and DSR Pin
3.7.1.
The data port is divided in 4 output and 4 input pins. This makes it possible to control a maximum of 8 binary
devices (4 input + 4 output devices) by a single AS-i Slave IC. Compatibility to multiplexed bi-directional
operation, as it is defined in certain IO Configurations for AS-i Slaves, can be achieved by external connection
of corresponding DI and DO pins and setting Multiplex_Data flag =’1’ in the Firmware Area of the E²PROM.
Every output pin (DO0…DO3) contains an NMOS open drain output driver; every input pin (DI0…DI3)
contains a high voltage high impedance input stage. Received output data is stored at the Data Output
Register and subsequently forwarded to the DO-pins. A certain time (t
to the port, the DI-pins are sampled.
The availability of new output data is signaled by the Data Strobe (DSR) signal as shown in Figure 10. The
DSR pin has an additional reset input function, that is described further in chapter 3.11 IC Reset.
Table 18: Timing Data Port Outputs
Symbol Parameter
t
t
t
t
t
1
2
3
4
DI0..DI3
Data Sheet
January 30, 2012
DO0..DO3
DSR
setupL
setupH
hold
DSR
DI-latch
The designed value is 0.5µs.
Parameter is only valid if Multiplex_Data flag is set in the Firmware Area of the E²PROM.
The timing of the resulting voltage signal also depends on the external pull up resistor.
The input data must be stable within the period defined by min. and max. values of t
ASI4U / ASI4U-E
Spec. 3.0 Com
Output data is valid LOW before DSR-H/L
Output driver is at high impedance state before DSR-H/L
Output driver is at high impedance state after DSR-H/L
Pulse width of Data Strobe (DSR)
Acceptance of input data
Slave Mode
Figure 10: Timing diagram data port DO0 ... DO3, DI0 … DI3, DSR
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
t
setup
pliant Universal AS-I IC
data port input data
data port output data
t
DSR
t
DI-latch
t
hold
Data remains constant,
if Multiplex_Data flag is
not set
DI-latch
min
) after new output data was written
Min
0.1
0.1
0.1
5
11
keep stable
Hi-Z, if Multiplex_Data flag
is set
max
6
13.5
Max
0.6
0.6
0.6
DI-latch
.
Unit
µs
µs
µs
µs
µs
35 of 63
Note
1
2
1, 2
3
4