74FCT573ATSOG IDT, 74FCT573ATSOG Datasheet - Page 2

• Manufacturer Part Number: 74FCT573ATSOG
• Description: Latches Octal Transparent Latch
• Manufacturer: IDT

Specifications of 74FCT573ATSOG

• Rohs: yes
• Number Of Circuits: 1
• Logic Type: Transparent Latch
• Logic Family: 74FCT
• Polarity: Inverting
• Number Of Output Lines: 8
• Propagation Delay Time: 5.2 ns
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8
• Supply Current: 10 uA
• Part # Aliases: IDT74FCT573ATSOG

PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
NOTE:
1. This parameter is measured at characterization but not tested.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
IDT54/74FCT573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
Symbol
C
C
Symbol
V
V
T
I
OUT
STG
TERM
TERM
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
IN
OUT
(2)
(3)
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
GND
Input Capacitance
Output Capacitance
Parameter
OE
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
Description
CERDIP/ SOIC/ QSOP
(1)
1
2
3
4
5
6
7
8
9
10
(T
TOP VIEW
A
= +25°C, F = 1.0MHz)
Conditions
V
V
OUT
IN
= 0V
= 0V
20
19
18
17
16
15
14
13
12
11
–0.5 to V
Typ.
–65 to +150
–60 to +120
6
8
–0.5 to +7
V
Max
LE
O
O
O
O
O
O
O
O
CC
CC
0
1
2
3
4
5
6
7
Max.
+0.5
10
12
(1)
Unit
Unit
pF
pF
mA
° C
V
V
2
INDEX
FUNCTION TABLE
PIN DESCRIPTION
NOTE:
1. H = HIGH Voltage Level
Pin Names
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
OE
O x
Dx
LE
D
D
D
D
D
Dx
H
X
L
2
3
4
5
6
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
4
5
6
7
8
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
Inputs
LE
H
H
X
3
9
10
2
TOP VIEW
LCC
(1)
11
1
Description
OE
H
20
12
L
L
13
19
18
17
16
15
14
Outputs
Ox
H
L
Z
O
O
O
O
O
1
2
3
4
5