NCP374MU075TXG ON Semiconductor, NCP374MU075TXG Datasheet - Page 4

• Manufacturer Part Number: NCP374MU075TXG
• Description: Current & Power Monitors & Regulators OVP +30 V & -30V W LOAD S
• Manufacturer: ON Semiconductor

Specifications of NCP374MU075TXG

• Rohs: yes
• Product: Current Regulators
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.5 V
• Input Voltage Range: 2.5 V to 5.5 V

PIN FUNCTION DESCRIPTION
1, 2
Pin
10
11
12
13
3
4
5
6
7
8
9
Name
VBUS
RES1
RES2
RES3
FLAG
PAD1
GND
DIR
Pin
Ilim
EN
NC
IN
OUTPUT
OUTPUT
POWER
POWER
POWER
POWER
INPUT
INPUT
INPUT
INPUT
INPUT
Type
NA
VBUS voltage pins: must be hardwired together on the PCB.
These pins are connected to the VBUS connector, and are protected against positive and negative
overvoltage events.
A 1 mF low ESR ceramic capacitor, or larger, must be connected between these pins and GND.
Ground
Reserved pin. Must be connected to GND potential and used for IC test.
Reserved pin. Must be connected to GND potential and used for IC test.
Reserved pin. Must be connected to GND potential and used for IC test.
Current Limit Pin. This pin provides the reference, based on the internal band−gap voltage reference,
to limit the over current, across internal NMosFet. A 0.1% tolerance resistor shall be used to get the
highest accuracy of the Over Current Limit.
Enable Pin. In combination with DIR, the internal NMOSes are turned on if Battery is applied on the
IN pins. (See logic table)
In enable mode, the internal Over−Current protection is activated from IN to VBUS. When enable
mode is disabled, the NCP374 current consumption, into IN pin, is drastically decreased to limit cur-
rent leakage of the self powered devices.
Direct Mode pin. This pin can be used, in combination with Enable pin, for the front end protection
applications like wireless devices. In this case, the part can be used as +/− OVP only. See logic
table.
Fault indication pin.
This pin allows an external system to detect fault condition.
The FLAG pin goes low when input voltage exceeds OVLO threshold or drops below UVLO
threshold (charging mode), charge current from IN to VBus exceeds current limit or internal temper-
ature exceeds thermal shutdown limit.
Since the FLAG pin is open drain functionality, an external pull up resistor to VBat must be added
(10 kW minimum value).
IN pin. In Front end application this pin is connected to charger device input or PMIC input.
In host application, this pin is connected to upstream DCDC. This pin is used as power supply of the
core and current from IN to VBUS is then limited to the external
Not internally connected. Can be connected to any potential.
Drain connection of the back to back MOSFET’s. This exposed pad mustn’t be connected to any
other potential and must be used for thermal dissipation of the internal MOSFETs.
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Description