NCP1840Q8A6MNG ON Semiconductor, NCP1840Q8A6MNG Datasheet - Page 9

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NCP1840Q8A6MNG

Manufacturer Part Number
NCP1840Q8A6MNG
Description
LED Lighting Drivers PRGRM MULTI LED DRIVER
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1840Q8A6MNG

Product Category
LED Lighting Drivers
Rohs
yes
Input Voltage
3 V to 5.5 V
Operating Frequency
400 kHz
Maximum Supply Current
0.75 mA
Output Current
30 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C

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Part Number:
NCP1840Q8A6MNG
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Register Writes & Reads
to be both written and read provides the user with the benefit
of being able to easily verify correct register writes and
isolate system problem areas while troubleshooting. This
ability also allows users to configure the register values
according to desired LED performance, read these register
values from the part, and then store these settings in external
memory for future use. In addition, an over−temperature
fault condition can also be read from a specific register,
allowing for diagnostic feedback to the system controller.
Write Protocol
depicted in Figure 13. As can be seen, the Master initiates
the communication by issuing a START condition and then
by broadcasting the 7−bit part address of the NCP1840
followed by a Write operation request (0). The NCP1840
acknowledges the request and then the Master transmits the
address byte which consists of 3−bits of control data
followed by the 5−bit address of the register to be written to.
Upon successful receipt of the address byte, the NCP1840
acknowledges to the Master which then transmits the data
START
WRITE PROTOCOL USED BY NCP1840:
1
S
READ PROTOCOL USED BY NCP1840:
1
S
S = Start Condition, W = Write, A = Acknowledge, P = Stop Condition
S = Start Condition, W = Write, R = Read, A = Acknowledge, A =No Acknowledge, P = Stop Condition
The ability of the NCP1840 to allow the internal registers
The Write protocol that is used by the NCP1840 is
0
1
Part Address
0
2
START
Part Address
7
1
Part Address
3
1
0
4
7
1
0
5
0
2
1
1
W
6
1
Part Address
3
1
7
1
A
1
WRITE
4
0
8
0
W
1
ACK
5
Control Bits
9
1
0
6
Control Bits
1
1
A
3
1
0
7
2
WRITE
Control Bits
1
0
3
8
A4
ACK CB2 CB1 CB0
4
Figure 13. NCP1840 Write Protocol
Figure 14. NCP1840 Read Protocol
3
9
Register Address
A3
5
Control Bits
1
A2
6
2
A1
7
http://onsemi.com
A0
3
8
Register
Address
A4
ACK
4
9
5
START
Register Address
A3
9
5
Register Address
A2
0
1
byte to be written. The NCP1840 then acknowledges the
received register data and the Master issues a STOP
condition to terminate the communication.
Read Protocol
in Figure 14. As can be seen, the Master initiates the
communication by issuing a START condition and then by
broadcasting the 7−bit part address of the NCP1840
followed by a Write operation request (0). This is because
the control bits need to first be set to 001 before a read
operation takes place. The NCP1840 acknowledges the
request and the Master then transmits the address byte which
consists of 001, for the 3 control bits, followed by the 5−bit
address of the register to be read from. Upon successful
receipt of the address byte, the NCP1840 acknowledges to
the Master which will then issue another START condition
followed by the 7−bit part address of the NCP1840 and a
Read operation request (1). The NCP1840 acknowledges
the request and then transmits the data byte to be read by the
Master. The NCP1840 then releases the SDA line and the
Master terminates the Read session by not acknowledging
the data byte and by issuing a STOP condition.
6
The Read protocol that is used by the NCP1840 is depicted
0
A1
2
1
A
7
5
1
Part Address
3
A0
8
8
S
1
4
ACK
9
0
5
Part Address
D7
1
1
6
D6
1
2
7
7
READ
D5
1
3
8
Register Data
ACK
D4
9
4
D7
D3
1
R
1
5
D6
2
D2
1
A
6
1
A
D5
3
Register Data Out
D1
7
D4
4
D0
Data Out
Register
Register
8
D3
5
Data
ACK
8
8
D2
9
6
STOP
D1
7
D0
8
ACK
A
A
1
1
9
STOP
1
P
1
P

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