AT24C512B-PU Atmel, AT24C512B-PU Datasheet

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... Die Sales: Wafer Form, Waffle Pack and Bumped Die Description The AT24C512B provides 524,288 bits of serial electrically erasable and programma- ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus ...

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... Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 0-1. Block Diagram VCC GND WP SCL SDA AT24C512B 2 *NOTICE: START STOP LOGIC SERIAL CONTROL LOGIC LOAD COMP DEVICE ADDRESS LOAD COMPARATOR R/W DATA WORD ADDR/COUNTER Y DEC ...

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... If the pin is left floating, the WP pin will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less. 5297A–SEEPR–1/08 AT24C512B ® recommends always 3 ...

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... Memory Organization AT24C512B, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of 128-bytes each. Random word addressing requires a 16-bit data word address. (1) Table 2-1. Pin Capacitance Applicable over recommended operating range from: T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (A ...

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... V AI 1.8-volt Min 1.3 0.6 (1) 0.05 1.3 (1) 0.6 0.6 0 100 0 0 AT24C512B = +1.8V to +5.5V 100 pF (unless oth- CC 2.5, 5.0-volt Max Min Max 400 1000 0.4 0.4 100 50 0.9 0.05 0.55 0.5 0.25 0.25 0 100 0.3 ...

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... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C512B features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...

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... The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. WR 5297A–SEEPR–1/08 t HIGH LOW LOW t t HD.STA HD.DAT t AA ACK t wr STOP CONDITION AT24C512B SU.DAT t DH (1) START CONDITION SU.STO t BUF 7 ...

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... Figure 3-4. Data Validity SDA SCL Figure 3-5. Start and Stop Definition SDA SCL Figure 3-6. Output Acknowledge SCL DATA IN DATA OUT AT24C512B 8 DATA STABLE DATA STABLE DATA CHANGE START 1 START STOP 8 9 ACKNOWLEDGE 5297A–SEEPR–1/08 ...

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... Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C512B has a hardware data protection scheme that allows the user to Write Protect the whole memory when the WP pin ...

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... The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 6-1. Figure 6-2. Byte Write AT24C512B 10 11). Figure 6-5 on page 11). Figure 6-6 on page ...

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... Figure 6-3. Page Write Figure 6-4. Current Address Read Figure 6-5. Random Read Figure 6-6. Sequential Read 5297A–SEEPR–1/08 AT24C512B 11 ...

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... Ordering Information Ordering Code AT24C512B-PU (Bulk form only) AT24C512B-PU25 (Bulk form only) (1) AT24C512BN-SH-B (NiPdAu Lead Finish) (2) AT24C512BN-SH-T (NiPdAu Lead Finish) (1) AT24C512BN-SH25-B (NiPdAu Lead Finish) (2) AT24C512BN-SH25-T (NiPdAu Lead Finish) (1) AT24C512BW-SH-B (NiPdAu Lead Finish) (2) AT24C512BW-SH-T (NiPdAu Lead Finish) (1) AT24C512BW-SH25-B (NiPdAu Lead Finish) (2) AT24C512BW-SH25-T ...

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... Lot Number to Use ALL Characters in Marking BOTTOM MARK Y = SEAL YEAR | Seal Week 6: 2006 | | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK AT24C512B WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 :: : :::: : 3: 2013 :: : :::: :: 50 = Week Week 52 No Bottom Mark WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 ...

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... Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 7.4 8-SOIC(2.5V) TOP MARK |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) AT24C512B 14 Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | ...

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... Y = SEAL YEAR 6: 2006 7: 2007 W 8: 2008 9: 2009 Country of origin SEAL YEAR 6: 2006 7: 2007 W 8: 2008 9: 2009 Country of origin A A AT24C512B WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 :: : :::: : 3: 2013 :: : :::: :: 50 = Week Week SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 ...

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... |---|---|---|---|---|---|---|---| Lot Number |---|---|---|---|---|---|---|---| * | Pin 1 Indicator (Dot) 7.8 8-Ultra Thin SAP (2.5V) TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| Lot Number |---|---|---|---|---|---|---|---| * | Pin 1 Indicator (Dot) AT24C512B 16 | Seal Week Y = SEAL YEAR | | | 6: 2006 7: 2007 2008 9: 2009 | Seal Week Y = SEAL YEAR | | | 6: 2006 7: 2007 2008 9: 2009 WW = SEAL WEEK 0: 2010 02 = Week 2 ...

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... M = SEAL MONTH (USE ALPHA DESIGNATOR A- JANUARY B = FEBRUARY " " """"""" OCTOBER K = NOVEMBER L = DECEMBER TC = TRACE CODE (ATMEL LOT NUMBERS TO CORRESPOND WITH ATK TRACE CODE LOG BOOK) 5297A–SEEPR–1/08 2FBU YMTC |<-- Pin 1 This Corner 7: 2007 8: 2008 9: 2009 AT24C512B 17 ...

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... Package Information U2-1 - dBGA2 A1 BALL PAD CORNER e (e1) 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TOP VIEW A1 BALL PAD CORNER (d1) BOTTOM VIEW 8 SOLDER BALLS TITLE 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Small Die Ball Grid Array Package (dBGA2) 5 ...

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... Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 5297A–SEEPR–1/ TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) AT24C512B End View COMMON DIMENSIONS (Unit of Measure = inches) MIN NOM MAX SYMBOL A 0.210 – – A2 ...

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... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...

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... San Jose, CA 95131 R 5297A–SEEPR–1/ TOP VIEW TOP VIEW SIDE VIEW SIDE VIEW TITLE 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) AT24C512B θ θ END VIEW END VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 1.70 2.16 A1 0.05 ...

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... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT24C512B TITLE 8A2, 8-lead, 4 ...

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... SYMBOL MIN A – A1 0.00 D 5.80 E 4.70 D1 3.30 E1 3. 0.50 TITLE 8Y7, 8-lead (6.00 x 4.90 mm Body) Ultra-Thin SOIC Array Package (UTSAP) Y7 AT24C512B NOM MAX NOTE – 0.60 – 0.05 6.00 6.20 4.90 5.10 3.40 3.50 4.00 4.10 0.40 0.45 1.27 TYP 3 ...

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... A1 BALL PAD CORNER e (e1) BOTTOM VIEW 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TOP VIEW A1 BALL PAD CORNER (d1) 8 SOLDER BALLS TITLE 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Small Die Ball Grid Array Package (dBGA2) 5 ...

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... Revision History Doc. Rev. 5297A 5297A–SEEPR–1/08 Date Comments AT24C512B product with date code 2008 work week 14 (814) or later supports 5Vcc operation 1/2008 Initial document release AT24C512B 25 ...

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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...