24AA1025-I/SM Microchip Technology, 24AA1025-I/SM Datasheet - Page 12

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24AA1025-I/SM

Manufacturer Part Number
24AA1025-I/SM
Description
IC EEPROM 1MBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24AA1025-I/SM

Memory Size
1M (128K x 8)
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Organization
128 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.7 V
Maximum Operating Current
5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V , 2.5 V , 3.3 V , 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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24AA1025/24LC1025/24FC1025
8.0
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
The 24XX1025 contains an address counter that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the
previous read access was to address n (n is any legal
address), the next current address read operation
would access data from address n + 1.
Upon receipt of the control byte with R/W bit set to one,
the 24XX1025 issues an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24XX1025 discontinues transmission
FIGURE 8-1:
DS21941H-page 12
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
READ OPERATION
Current Address Read
S
S
T
A
R
T
1
0
1
Control
Byte
0 B A A 1
CURRENT ADDRESS
READ
0 1 0
A
C
K
(Figure
Data
Byte
8-1).
N
O
A
C
K
S
T
O
P
P
8.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24XX1025 as part of a write operation (R/W bit set to
0). After the word address is sent, the master
generates a Start condition following the acknowledge.
This terminates the write operation, but not before the
internal Address Pointer is set. Then, the master issues
the control byte again, but with the R/W bit set to a one.
The 24XX1025 will then issue an acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition which causes the 24XX1025 to discontinue
transmission
command, the internal address counter will point to the
address location following the one that was just read.
8.3
Sequential reads are initiated in the same way as a
random read except that after the 24XX1025 transmits
the first data byte, the master issues an acknowledge
as opposed to the Stop condition used in a random
read. This acknowledge directs the 24XX1025 to
transmit the next sequentially addressed 8-bit word
(Figure
master, the master will NOT generate an acknowledge,
but will generate a Stop condition. To provide
sequential reads, the 24XX1025 contains an internal
Address Pointer which is incremented by one at the
completion of each operation. This Address Pointer
allows half the memory contents to be serially read
during one operation. Sequential read address
boundaries are 0000h to FFFFh and 10000h to
1FFFFh.
automatically roll over from address FFFF to address
0000 if the master acknowledges the byte received
from the array address, 1FFFF. The internal address
counter will automatically roll over from address
1FFFFh to address 10000h if the master acknowledges
the byte received from the array address, 1FFFFh.
8-3). Following the final byte transmitted to the
Random Read
Sequential Read
The
(Figure
internal
8-2). After a random Read
 2011 Microchip Technology Inc.
Address
Pointer
will

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