74AC00SCX_Q Fairchild Semiconductor, 74AC00SCX_Q Datasheet
74AC00SCX_Q
Specifications of 74AC00SCX_Q
Related parts for 74AC00SCX_Q
74AC00SCX_Q Summary of contents
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... B Inputs Outputs n ©1988 Fairchild Semiconductor Corporation 74AC00, 74ACT00 Rev. 1.4.1 General Description The AC00/ACT00 contains four, 2-input NAND gates. Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4 ...
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... V Output Voltage O T Operating Temperature Minimum Input Edge Rate, AC Devices: V from 30 Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC00, 74ACT00 Rev. 1.4.1 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA –0. 0.5V CC – ...
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... All outputs loaded; thresholds on input associated with output under test. 2. Maximum test duration 2.0ms, one output loaded at a time and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. ©1988 Fairchild Semiconductor Corporation 74AC00, 74ACT00 Rev. 1.4.1 T +25° ...
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... OLD (5) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC00, 74ACT00 Rev. 1.4.1 T +25° (V) Conditions Typ. 4.5 V ...
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... AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH t Propagation Delay PHL Note: 7. Voltage Range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74AC00, 74ACT00 Rev. 1.4.1 T +25° 50pF L (6) V (V) Min. Typ. Max. CC 3.3 2.0 7.0 9.5 5.0 1 ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...