MAX16046ETN+CK9 Maxim Integrated, MAX16046ETN+CK9 Datasheet - Page 48

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MAX16046ETN+CK9

Manufacturer Part Number
MAX16046ETN+CK9
Description
Supervisory Circuits 12Ch EEPROM Prob System Manager
Manufacturer
Maxim Integrated
Series
MAX16046, MAX16048r
Datasheet

Specifications of MAX16046ETN+CK9

Rohs
yes
When r4Dh[3] is ‘1’ the watchdog timer operates in the
independent mode. In the independent mode, the
watchdog timer operates as if it were a separate chip.
The watchdog timer is activated immediately upon V
exceeding UVLO and once the boot-up sequence is
finished. If RESET is asserted by the sequencer state
machine, the watchdog timer and WDO will not be
affected.
There will be a long startup delay if r55h[6] is a ‘1.’ If
r55h[6] is a ‘0,’ there will not be a long startup delay.
In independent mode, if the Watchdog Reset Output
Enable bit r55h[7] is set to ‘1,’ when the watchdog timer
expires, WDO will be asserted, then RESET will be
asserted. WDO will then be deasserted. WDO will be
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 30. Miscellaneous Settings
48
REGISTER/
ADDRESS
EEPROM
5Ch
5Dh
65h
Independent Watchdog Timer Operation
BIT RANGE
[7:0]
[7:2]
[2:0]
[7:3]
[0]
[1]
Configuration Lock
0 = Configuration registers and EEPROM writable.
1 = Configuration registers and EEPROM [except r5Dh] locked.
EEPROM Fault Data Lock Flag (set automatically after fault log is triggered):
0 = EEPROM is not locked. A triggered fault log stores fault information to EEPROM.
1 = EEPROM addresses 00h to 11h are locked. Write a ‘1’ to this bit to toggle the flag.
Not used
Manufacturing revision code. This register is read only. Not stored in EEPROM.
Not used
User identification. Eight bits of memory for user-defined identification.
CC
low for 3 system clock cycles or approximately 1µs. If
the Watchdog Reset Output Enable bit (r55h[7]) is set
to ‘0,’ when the WDT expires, WDO will be asserted but
RESET will not be affected.
Table 30 lists several miscellaneous programmable
items. Register r5Ch provides storage space for a user-
defined configuration or firmware version number. Bit
r5Dh[0] locks and unlocks the configuration registers.
Bit r5Dh[1] locks and unlocks EEPROM addresses 00h
to 11h. Write data to EEPROM r5Dh as normally done;
however, to toggle a bit in register r5Dh, write a ‘1’ to
that bit. The r65h[2:0] bits contain a read-only manufac-
turing revision code.
DESCRIPTION
Miscellaneous

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