CAT1025WI-28-T3 ON Semiconductor, CAT1025WI-28-T3 Datasheet

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CAT1025WI-28-T3

Manufacturer Part Number
CAT1025WI-28-T3
Description
Supervisory Circuits CPU w/2K
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT1025WI-28-T3

Product Category
Supervisory Circuits
Rohs
yes
Number Of Voltages Monitored
1
Monitored Voltage
3 V, 3.3 V, 5 V
Undervoltage Threshold
2.85 V
Overvoltage Threshold
3 V
Manual Reset
Resettable
Watchdog
No Watchdog
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8 Wide
Maximum Power Dissipation
1000 mW
Minimum Operating Temperature
- 40 C
Supply Current (typ)
3000 uA
Supply Voltage - Min
2.7 V
CAT1024, CAT1025
Supervisory Circuits with
I
EEPROM and Manual Reset
Description
solutions for microcontroller−based systems. A 2k−bit serial
EEPROM memory and a system power supervisor with brown−out
protection are integrated together in low power CMOS technology.
Memory interface is via a 400 kHz I
drain outputs: one (RESET) drives high and the other (RESET) drives
low whenever V
CAT1025 also has a Write Protect input (WP). Write operations are
disabled if WP is connected to a logic high.
only a RESET output and does not have a Write Protect input.
a system to a known state if software or a hardware glitch halts or
“hangs” the system. For the CAT1024 and CAT1022, the watchdog
timer monitors the SDA signal. The CAT1023 has a separate watchdog
timer interrupt input pin, WDI.
system controllers during power up/down and against brownout
conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V
systems. If power supply voltages are out of tolerance reset signals
become active, preventing the system microcontroller, ASIC or
peripherals from operating. Reset signals become inactive typically
200 ms after the supply voltage exceeds the reset threshold level. With
both active high and low reset signals, interface to microcontrollers
and other ICs is simple. In addition, the RESET pin or a separate input,
MR, can be used as an input for push−button manual reset capability.
hardware data protection is provided by a V
prevents writes to memory whenever V
threshold or until V
8−pin SO, 8−pin TSSOP, 8−pin TDFN and 8−pin MSOP packages.
The TDFN package thickness is 0.8 mm maximum. TDFN footprint is
3 x 3 mm.
Features
© Semiconductor Components Industries, LLC, 2011
November, 2011 − Rev. 20
2
The CAT1024 and CAT1025 are complete memory and supervisory
The CAT1025 provides a precision V
The CAT1024 also provides a precision V
All supervisors have a 1.6 second watchdog timer circuit that resets
The power supply monitor and reset circuit protect memory and
The CAT1024/25 memory features a 16−byte page. In addition,
Available packages include an 8−pin PDIP and a surface mount
Precision Power Supply Voltage Monitor
Active High or Low Reset
400 kHz I
2.7 V to 5.5 V Operation
Low Power CMOS Technology
16−Byte Page Write Buffer
C Serial 2k-bit CMOS
5 V, 3.3 V and 3 V Systems
Five Threshold Voltage Options
Valid Reset Guaranteed at V
2
C Bus
CC
CC
falls below the reset threshold voltage. The
reaches the reset threshold during power up.
CC
2
= 1 V
C bus.
CC
sense circuit and two open
CC
CC
falls below the reset
sense circuit, but has
CC
sense circuit that
1
Built−in Inadvertent Write Protection
1,000,000 Program/Erase Cycles
Manual Reset Input
100 Year Data Retention
Industrial and Extended Temperature Ranges
Green Packages Available with NiPdAu Lead Finished
These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
WP Pin (CAT1025)
CASE 646AA
For Ordering Information details, see page 13.
PDIP−8
CASE 846AD
ORDERING INFORMATION
MSOP−8
http://onsemi.com
CASE 948S
TSSOP−8
Publication Order Number:
CASE 511AL
TDFN−8
CASE 751BD
SOIC−8
CAT1024/D

Related parts for CAT1025WI-28-T3

CAT1025WI-28-T3 Summary of contents

Page 1

... CAT1024, CAT1025 Supervisory Circuits with Serial 2k-bit CMOS EEPROM and Manual Reset Description The CAT1024 and CAT1025 are complete memory and supervisory solutions for microcontroller−based systems. A 2k−bit serial EEPROM memory and a system power supervisor with brown−out protection are integrated together in low power CMOS technology. ...

Page 2

Table 1. THRESHOLD VOLTAGE OPTION Part Dash Minimum Number Threshold −45 4.50 −42 4.25 −30 3.00 −28 2.85 −25 2.55 BLOCK DIAGRAM EXTERNAL LOAD D OUT ACK V CC WORDADDRESS STA RT/ ...

Page 3

DIP Package (L) SOIC Package (W) TSSOP Package (Y) MSOP Package ( RESET 2 CAT1024 RESET 2 CAT1025 3 RESET RESET/RESET: RESET OUTPUTs (RESET CAT1025 Only) These are ...

Page 4

... CAT1024 n CAT1025 n CAT1026 CAT1027 n NOTE: For supervisory circuits with embedded 16k EEPROM, please refer to the CAT1161, CAT1162 and CAT1163 data sheets. Table 5. ABSOLUTE MAXIMUM RATINGS Parameters Temperature Under Bias Storage Temperature Voltage on any Pin with Respect to Ground (Note 1) V with Respect to Ground ...

Page 5

Table 6. D.C. OPERATING CHARACTERISTICS 5.5 V and over the recommended temperature conditions unless otherwise specified. CC Symbol Parameter V Reset Threshold TH V Reset Output Valid V RVALID V (Note 4) Reset Threshold Hysteresis ...

Page 6

Table 9. RESET CIRCUIT AC CHARACTERISTICS Symbol Parameter t Power−Up Reset Timeout PURST RESET output Delay RDP Glitch Reject Pulse Width GLITCH CC MR Glitch Manual Reset Glitch Immunity t MR Pulse Width MRW ...

Page 7

Reset Controller Description The CAT1024/25 precision RESET controllers ensure correct system operation during brownout and power up/down conditions. They are configured with open drain RESET outputs. During power−up, the RESET outputs remain active until V reaches the V threshold and ...

Page 8

RVALID t V PURST CC RESET RESET MR RESET RESET t GLITCH t RPD Figure 1. RESET Output Timing t MRW t t MRD PURST Figure 2. MR Operation and Timing http://onsemi.com 8 t RPD t PURST ...

Page 9

The CAT1024 and CAT1025 feature a 2−kbit embedded 2 serial EEPROM that supports the I C Bus data transmission protocol. This Inter−Integrated Circuit Bus protocol defines any device that sends data to the bus transmitter and any ...

Page 10

After a successful data transfer, each receiving device is required to generate an acknowledge. The acknowledging device pulls down the SDA line during the ninth clock cycle, signaling that it received the 8 bits of data. The CAT1024/25 responds with ...

Page 11

Page Write The CAT1024/25 writes bytes of data in a single write cycle, using the Page Write operation. The page write operation is initiated in the same manner as the byte write operation, however instead of terminating ...

Page 12

BUS ACTIVITY: SDA LINE SCL SDA Immediate/Current Address Read The CAT1024 and CAT1025 address counter contains the address of the last byte accessed, incremented by one. In other words, if the last READ or WRITE access was to address N, ...

Page 13

... For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. 4. TDFN not available in NiPdAu (–G) version. 5. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device Nomenclature document, TND310/D, available at www.onsemi.com DATA n+1 DATA n+2 ...

Page 14

... CAT1025LI−25−G 2.55 V − 2.70 V CAT1025WI−45−GT3 4.50 V − 4.75 V CAT1025WI−42−GT3 4.25 V − 4.50 V CAT1025WI−30−GT3 3.00 V − 3.15 V CAT1025WI−28−GT3 2.85 V − 3.00 V CAT1025WI−25−GT3 2.55 V − 2.70 V CAT1025YI−45−GT3 4.50 V − 4.75 V CAT1025YI−42−GT3 4.25 V − 4.50 V CAT1025YI−30−GT3 3.00 V − 3.15 V CAT1025YI−28−GT3 2.85 V − 3.00 V CAT1025YI−25−GT3 2.55 V − ...

Page 15

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 16

PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...

Page 17

E E1 TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187. MSOP 8, 3x3 CASE 846AD−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 18

D PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A3 0.20 REF b 0.23 0.30 D 2.90 3.00 D2 2.20 −−− E 2.90 3.00 E2 1.40 −−− e 0.65 TYP L 0.20 0.30 Notes: ...

Page 19

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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