71V256SA15YGI8 IDT, 71V256SA15YGI8 Datasheet

71V256SA15YGI8
Manufacturer Part Number	71V256SA15YGI8
Description	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM
Manufacturer	IDT
71V256SA15YGI8 datasheet	1. 71V256SA15PZGI.pdf (8 pages)

Specifications of 71V256SA15YGI8
Rohs	yes	Part # Aliases	IDT71V256SA15YGI8

Page 1/8

Download datasheet (91Kb)Embed

Prev Next

Features

◆ ◆ ◆ ◆ ◆

Ideal for high-performance processor secondary cache

◆ ◆ ◆ ◆ ◆

Commercial (0°C to +70°C) and Industrial (–40°C to +85°C)

temperature range options

◆ ◆ ◆ ◆ ◆

Fast access times:

– Commercial and Industrial: 10/12/15/20ns

◆ ◆ ◆ ◆ ◆

Low standby current (maximum):

– 2mA full standby

◆ ◆ ◆ ◆ ◆

Small packages for space-efficient layouts:

– 28-pin 300 mil SOJ

– 28-pin TSOP Type I

◆ ◆ ◆ ◆ ◆

Produced with advanced high-performance CMOS

technology

◆ ◆ ◆ ◆ ◆

Inputs and outputs are LVTTL-compatible

◆ ◆ ◆ ◆ ◆

Single 3.3V(±0.3V) power supply

Functional Block Diagram

ADDRESS

DECODER

I/O

INPUT

DATA

CIRCUIT

I/O

CONTROL

CIRCUIT

Lower Power

3.3V CMOS Fast SRAM

256K (32K x 8-Bit)

Description

The IDT71V256SA is a 262,144-bit high-speed static RAM organized

as 32K x 8. It is fabricated using IDT’s high-performance, high-reliability

CMOS technology.

The IDT71V256SA has outstanding low power characteristics while

at the same time maintaining very high performance. Address access

times of as fast as 10ns are ideal for 3.3V secondary cache in 3.3V

desktop designs.

When power management logic puts the IDT71V256SA in standby

mode, its very low power characteristics contribute to extended battery life.

By taking CS HIGH, the SRAM will automatically go to a low power standby

mode and will remain in standby as long as CS remains HIGH. Further-

more, under full standby mode (CS at CMOS level, f=0), power consump-

tion is guaranteed to always be less than 6.6mW and typically will be much

smaller.

The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin

300 mil TSOP Type I.

262,144 BIT

MEMORY ARRAY

I/O CONTROL

IDT71V256SA

GND

3101 drw 01

JUNE 2012

DSC-3101/09

Download datasheet (91Kb)

Related parts for 71V256SA15YGI8
Part Number	Description	Manufacturer	Datasheet
71V256SA10Y		IDT, Integrated Device Technology Inc	71V256SA10Y.pdf (8 pages)
71V256SA10YG		IDT, Integrated Device Technology Inc	71V256SA10YG.pdf (8 pages)
71V256SA15PZGI	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12PZG	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA15YG8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA15YG	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12YG	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA15PZGI8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12YG8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA15PZG8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12PZGI	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA15PZG	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12YGI	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12PZG8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)
71V256SA12PZGI8	SRAM 32Kx8 ASYNCHRONOUS 3.3V STATIC RAM	IDT	71V256SA15PZGI.pdf (8 pages)

71V256SA15YGI8 Summary of contents
Page 1 ... CS remains HIGH. Further- more, under full standby mode (CS at CMOS level, f=0), power consump- tion is guaranteed to always be less than 6.6mW and typically will be much smaller. The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin 300 mil TSOP Type I. 262,144 BIT MEMORY ARRAY ... Page 2 ... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Pin Configurations SO28 GND 14 DIP/SOJ Top View ... Page 3 ... Ground V Input High Voltage - Inputs 2 Input High Voltage - I/O 2 Input Low Voltage -0.3 IL NOTE (min.) = –2.0V for pulse width less than 5ns, once per cycle Electrical Characteristics (V = 3.3V ± 0.3V 0.2V Ranges) Symbol Parameter I Dynamic Operating Current CS < (2) Open Max ... Page 4 ... Write Cycle Time WC t Address Valid to End-of-Write AW t Chip Select to End-of-Write CW t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time WR t Data to Write Time Overlap DW t Data Hold from Write Time DH (1) Output Active from End-of-Write ... Page 5 ... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Timing Waveform of Read Cycle No. 1 ADDRESS OE CS DATA OUT NOTES HIGH for Read cycle. 2. Transition is measured ±200mV from steady state. Timing Waveform of Read Cycle No. 2 ADDRESS PREVIOUS DATA VALID DATA OUT Timing Waveform of Read Cycle No. 3 ... Page 6 ... the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state LOW during a WE controlled write cycle, the write pulse width must be the larger of t placed on the bus for the required HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse can be as short as the ... Page 7 ... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Ordering Information — Commercial and Industrial 71V256 SA XX Device Power Speed Package Type Process/ Tape & Reel Temperature Range 6.42 7 Commercial and Industrial Temperature Ranges X 8 Commercial (0°C to +70°C) Blank I Industrial (–40°C to +85°C) ... Page 8 ... Pg. 7 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Updated to new format Expanded Industrial Temperature offerings Removed 28-pin 300 mil plastic DIP package offering Removed Note No. 1 from Write Cycle No. 1 diagram; renumbered notes and footnotes ...

71V256SA15YGI8 Summary of contents

Page 1
... CS remains HIGH. Further- more, under full standby mode (CS at CMOS level, f=0), power consump- tion is guaranteed to always be less than 6.6mW and typically will be much smaller. The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin 300 mil TSOP Type I. 262,144 BIT MEMORY ARRAY ...
Page 2
... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Pin Configurations SO28 GND 14 DIP/SOJ Top View ...
Page 3
... Ground V Input High Voltage - Inputs 2 Input High Voltage - I/O 2 Input Low Voltage -0.3 IL NOTE (min.) = –2.0V for pulse width less than 5ns, once per cycle Electrical Characteristics (V = 3.3V ± 0.3V 0.2V Ranges) Symbol Parameter I Dynamic Operating Current CS < (2) Open Max ...
Page 4
... Write Cycle Time WC t Address Valid to End-of-Write AW t Chip Select to End-of-Write CW t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time WR t Data to Write Time Overlap DW t Data Hold from Write Time DH (1) Output Active from End-of-Write ...
Page 5
... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Timing Waveform of Read Cycle No. 1 ADDRESS OE CS DATA OUT NOTES HIGH for Read cycle. 2. Transition is measured ±200mV from steady state. Timing Waveform of Read Cycle No. 2 ADDRESS PREVIOUS DATA VALID DATA OUT Timing Waveform of Read Cycle No. 3 ...
Page 6
... the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state LOW during a WE controlled write cycle, the write pulse width must be the larger of t placed on the bus for the required HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse can be as short as the ...
Page 7
... IDT71V256SA 3.3V CMOS Static RAM 256K (32K x 8-Bit) Ordering Information — Commercial and Industrial 71V256 SA XX Device Power Speed Package Type Process/ Tape & Reel Temperature Range 6.42 7 Commercial and Industrial Temperature Ranges X 8 Commercial (0°C to +70°C) Blank I Industrial (–40°C to +85°C) ...
Page 8
... Pg. 7 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Updated to new format Expanded Industrial Temperature offerings Removed 28-pin 300 mil plastic DIP package offering Removed Note No. 1 from Write Cycle No. 1 diagram; renumbered notes and footnotes ...

71V256SA15YGI8

71V256SA15YGI8

Specifications of 71V256SA15YGI8

Related parts for 71V256SA15YGI8

71V256SA15YGI8 Summary of contents

Related keywords: