6116LA20SOG IDT, 6116LA20SOG Datasheet - Page 7

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6116LA20SOG

Manufacturer Part Number
6116LA20SOG
Description
SRAM 16K Asynch. 2Kx8 HS, L-Pwr, SRAM
Manufacturer
IDT
Datasheet

Specifications of 6116LA20SOG

Rohs
yes
Part # Aliases
IDT6116LA20SOG
Timing Waveform of Read Cycle No. 1
V
Supply
Currents
Timing Waveform of Read Cycle No. 2
Timing Waveform of Read Cycle No. 3
NOTES:
1. WE is HIGH for Read cycle.
2. Device is continously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. OE is LOW.
5. Transition is measured ±500mV from steady state.
ADDRESS
DATA
DATA
CC
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
ADDRESS
DATA
OUT
OUT
CS
OUT
I
OE
CS
I
CC
SB
PREVIOUS DATA VALID
t
PU
t
t
CLZ
CLZ
t
ACS
(5)
t
OH
(5)
t
OLZ
t
AA
t
ACS
t
t
(5)
AA
RC
6.42
t
RC
t
OE
7
(1,3)
(1,2,4)
(1,3,4)
Military, Commercial, and Industrial Temperature Ranges
DATA VALID
DATA VALID
DATA
VALID
t
t
CHZ
OHZ
t
OH
t
CHZ
(5)
(5)
(5)
t
t
OH
PD
3089 drw 07
3089 drw 08
3089 drw 06
,
,
,

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