M95020-RMB6TG STMicroelectronics, M95020-RMB6TG Datasheet - Page 8

IC EEPROM 2KBIT 5MHZ 8UFDFPN

M95020-RMB6TG

Manufacturer Part Number
M95020-RMB6TG
Description
IC EEPROM 2KBIT 5MHZ 8UFDFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95020-RMB6TG

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MLP, 8-UFDFPN
Memory Configuration
256 X 8
Interface Type
Serial, SPI
Clock Frequency
5MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
DFN
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8709-2
M95020-RMB6TG

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
M95020-RMB6TG
Manufacturer:
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Part Number:
M95020-RMB6TG
Manufacturer:
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Quantity:
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Signal description
2
2.1
2.2
2.3
2.4
2.5
8/43
Signal description
During all operations, V
V
All of the input and output signals can be held high or low (according to voltages of V
V
Serial Data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (C).
Serial Data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be written. Values are latched on the rising edge of Serial Clock
(C).
Serial Clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data Output (Q) changes after the falling edge of Serial Clock (C).
Chip Select (S)
When this input signal is high, the device is deselected and Serial Data Output (Q) is at high
impedance. Unless an internal Write cycle is in progress, the device will be in the Standby
Power mode. Driving Chip Select (S) low selects the device, placing it in the Active Power
mode.
After Power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
Hold (HOLD)
The Hold (HOLD) signal is used to pause any serial communications with the device without
deselecting the device.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To start the Hold condition, the device must be selected, with Chip Select (S) driven low.
CC
IL
or V
(min) to V
OL
, as specified in
CC
(max).
CC
Table 13
must be held stable and within the specified valid range:
Doc ID 6512 Rev 8
to
Table
16). These signals are described next.
M95040, M95020, M95010
IH
, V
OH
,

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