M24C32-WDW6TP STMicroelectronics, M24C32-WDW6TP Datasheet
M24C32-WDW6TP
Specifications of M24C32-WDW6TP
M24C32-WDW6TP
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M24C32-WDW6TP Summary of contents
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... Supports the I C bus modes: – 400 kHz Fast-mode – 100 kHz Standard-mode ■ Single supply voltages: – 2 5.5 V (M24C32-W) – 1 5.5 V (M24C32-R) – 1 5.5 V (M24C32-F) ■ Write Control input ■ Byte and Page Write ■ Random and Sequential Read modes ■ ...
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... Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.9 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 4.10 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.11 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F ...
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... M24C32-W M24C32-R M24C32-F 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Doc ID 4578 Rev 17 Contents 3/38 ...
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... UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 21. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 22. Available M24C32 products (package, voltage range, temperature grade Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4/38 M24C32-W M24C32-R M24C32-F Doc ID 4578 Rev 17 ...
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... M24C32-W M24C32-R M24C32-F List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. DIP, SO, TSSOP and UFDFPN connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Maximum R value versus bus parasitic capacitance (C) for Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Write mode sequences with (data write inhibited Figure 8. ...
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... Description 1 Description The M24C32-W, M24C32-R and M24C32-F devices are I erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits. Figure 1. Logic diagram uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The devices carry a built-in 4-bit device type identifier code (1010) in accordance with the I bus definition ...
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... M24C32-W M24C32-R M24C32-F Table 1. Signal names Signal name E0, E1, E2 SDA SCL Figure 2. DIP, SO, TSSOP and UFDFPN connections 1. See Package mechanical data Function Chip Enable Serial Data Serial Clock Write Control Supply voltage Ground section for package dimensions, and how to identify pin-1. ...
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... When Write Control (WC) is driven high, device select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/38 indicates how the value of the pull-up resistor can be calculated M24xxx M24xxx Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F . (Figure 4 indicates how CC Figure 3. When not connected (left Ai12806 , and IL CC ...
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... M24C32-W M24C32-R M24C32-F 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V Table 9). In order to secure a stable DC supply voltage recommended to decouple the ...
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... Bus line capacitor (pF) SDA SDA Start Input Change Condition MSB MSB Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F = 1.3 µs (min value for LOW = 400 kHz), the R bus × C bus SCL I²C bus master SDA C Stop Condition ACK 7 8 ...
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... M24C32-W M24C32-R M24C32-F Table 2. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. Table 3. Address most significant byte b15 b14 Table 4. Address least significant byte ...
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... Memory organization 3 Memory organization The memory is organized as shown in Figure 6. Block diagram SCL SDA 12/38 Figure 6. Control Logic I/O Shift Register Address Register and Counter Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F High Voltage Generator Data Register 1 Page X Decoder AI06899 ...
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... M24C32-W M24C32-R M24C32-F 4 Device operation The device supports the I data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization ...
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... Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32 bus. Each one is given a th bit time. If the device does not match Initial sequence Start, device select Start, device select Address reStart, device select Similar to Current or Random Address Read Start, device select ...
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... M24C32-W M24C32-R M24C32-F Figure 7. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev select Byte address Byte address R/W ACK ACK Dev select Byte address Byte address R/W NO ACK NO ACK Data in N Doc ID 4578 Rev 17 ...
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... NoAck. After each byte is transferred, the internal byte address counter (inside the page) is incremented. The transfer is terminated by the bus master generating a Stop condition. 16/38 M24C32-W M24C32-R M24C32-F , and the successful completion of a Write operation, W Figure 8 ...
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... M24C32-W M24C32-R M24C32-F Figure 8. Write mode sequences with (data write enabled) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev Select Byte address Byte address R/W ACK ACK Dev Select Byte address Byte address R/W ACK ACK Data in N Doc ID 4578 Rev 17 ...
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... Stop Data for the Write operation Continue the Write operation , but the typical time is shorter. To make use of this, a polling sequence can Figure 9, is: Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F YES Send address and receive ACK NO Start YES condition Device select with ...
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... M24C32-W M24C32-R M24C32-F Figure 10. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. ACK NO ACK Dev select Data out R/W ...
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... For all Read commands, the device waits, after each byte read, for an acknowledgment th during the 9 bit time. If the bus master does not drive Serial Data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 20/38 Figure 10. Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F ...
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... M24C32-W M24C32-R M24C32-F 5 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 6 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied ...
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... Ambient operating temperature (device grade 5) Table 10. AC test measurement conditions Symbol C Load capacitance L Input rise and fall times Input levels Input and output timing reference levels 22/38 M24C32-W M24C32-R M24C32-F Parameter Parameter Parameter Parameter Doc ID 4578 Rev 17 Min. Max. Unit 2.5 5.5 V – ...
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... M24C32-W M24C32-R M24C32-F Figure 11. AC test measurement I/O waveform Table 11. Input parameters Symbol C Input capacitance (SDA Input capacitance (other pins input impedance WCL ( input impedance WCH Pulse width ignored ( (Input filter on SCL and SDA) 1. Characterized only. Table 12. DC characteristics (M24xxx-W, device grade 6) ...
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... Input high voltage (WC, E0, E1, E2) V Output low voltage the application uses the M24C32-R at 2.5 V < V characteristics (M24xxx-W, device grade 6) 2. Characterized value, not tested in production. 3. The device is not selected after power-up, after a Read command (after the Stop condition) or after the completion of the ...
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... M24C32-W M24C32-R M24C32-F Table 15. DC characteristics (M24xxx-F) Symbol Input leakage current I LI (SCL, SDA, E2, E1, E0) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage (SDA, SCL WC) Input high voltage (SCL, SDA) ...
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... Start condition hold time Stop condition set up time Time between Stop condition and next Start condition Write time × C time constant is within the values specified in bus bus Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F 7, Table 8 and Table 9 Min. Max. 400 600 1300 ...
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... M24C32-W M24C32-R M24C32-F Figure 12. AC waveforms Doc ID 4578 Rev 17 DC and AC parameters 27/38 ...
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... Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32 PDIP-B (1) inches Typ. Min. Max. 0.2098 0.0150 0.1299 0.1150 0.1949 0.0181 0.0142 0.0220 0.0598 0.0449 ...
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... M24C32-W M24C32-R M24C32-F Figure 14. SO8 narrow – 8 lead plastic small outline, 150 mils body width, package outline A2 1. Drawing is not to scale. Table 18. SO8 narrow – 8 lead plastic small outline, 150 mils body width, package mechanical data Symbol ccc Values in inches are converted from mm and rounded to 4 decimal digits. ...
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... Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32 TSSOP8AM (1) inches Typ. Min. Max. 0.0472 0.0020 0.0059 0.0394 0.0315 0.0413 0.0075 0.0118 0.0035 0.0079 ...
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... M24C32-W M24C32-R M24C32-F Figure 16. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package outline 1. Drawing is not to scale. 2. The central pad (the E2 × D2 area in the above illustration) is internally pulled to V connected to any other voltage or signal line on the PCB, for example during the soldering process. ...
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... Used only for device grade 3 and WLCSP packages. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 32/38 M24C32– (2) (2) (2) ® (RoHS compliant) Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32 (3) over –40 to 125°C. ...
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... M24C32-W M24C32-R M24C32-F Table 22. Available M24C32 products (package, voltage range, temperature grade) Package DIP8 (BN) SO8N (MN) TSSOP8 (DW) MLP8 (MB) M24C32-F M24C32-R 1 5 Grade 6 Grade 5 Grade 6 Grade 5 Grade 6 Doc ID 4578 Rev 17 Part numbering M24C32-W 2 5.5 V Grade6 Grade 3 Grade 6 Grade 6 - 33/38 ...
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... Not for New Design. Some minor wording changes. AEC-Q100- 5.0 002 compliance. t (max) changed pins of the device. Z WCL 6.0 UFDFPN8 package added. Small text changes. Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F Changes for E2-E0 and LI (min) improved to -0.45V. IL (min) and V (min) improved ...
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... Document converted to new ST template. M24C32 and M24C64 products (4.5 to 5.5V supply voltage) removed. M24C64 and M24C32 products (1.7 to 5.5V supply voltage) added. Section 2.3: Chip Enable (E0, E1, E2) (WC) modified, Section 2.6: Supply voltage (V Power On Reset: VCC Lock-Out Write Protect ...
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... Section 4.9: ECC (error correction code) and write cycling updated. I added to Table 6: Absolute maximum OL Table 24: Available M24C32 products (package, voltage range, 15 temperature grade) and Table 25: Available M24C32 products (package, voltage range, temperature grade) Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F Changes conditions, updated Section 2 ...
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... M24C32-W M24C32-R M24C32-F Table 23. Document revision history (continued) Date Revision 05-Jan-2009 07-Dec-2009 I2C modes supported specified in 16 Note removed from Table 15: DC characteristics changes. 64 and 128 Kbit densities removed. ECOPACK status of packages specified Ordering information scheme. Section 2.6.2: Power-up conditions Figure 4: Maximum R ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 38/38 Please Read Carefully: © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 4578 Rev 17 M24C32-W M24C32-R M24C32-F ...