MAX6736XKMRD3-T Maxim Integrated, MAX6736XKMRD3-T Datasheet - Page 13

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MAX6736XKMRD3-T

Manufacturer Part Number
MAX6736XKMRD3-T
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX6736, MAX6737, MAX6738, MAX6739, MAX6740, MAX6741, MAX6742, MAX6743, MAX6744, MAX6745r
Datasheet

Specifications of MAX6736XKMRD3-T

Number Of Voltages Monitored
2
Monitored Voltage
1.8 V to 5 V, 0.9 V to 3.3 V
Undervoltage Threshold
4.25 V, 2.55 V
Overvoltage Threshold
4.5 V, 2.7 V
Output Type
Active Low, Open Drain
Manual Reset
Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
225 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SC-70
Chip Enable Signals
No
Maximum Power Dissipation
247 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Supply Current (typ)
5 uA, 10 uA
Supply Voltage - Min
1 V
The MAX6741/MAX6744 offer a V
for V
long as V
exceeds V
open-drain POK1 output is deasserted. The POK1 output
can then enable the V
POK1 pullup resistor). RESET is deasserted when both
V
for the reset timeout period (t
be used for I/O before core or core before I/O sequenc-
ing, depending on the selected V
See the Typical Application Circuit and Figure 1.
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 4. When the negative supply is valid, PFO is low.
When the negative supply voltage drops, PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, V
CC
1 and V
CC
1-to-V
CC
TH
CC
1 is below its V
1 for the POK1 timeout period (t
CC
2 remain above their selected thresholds
Monitoring a Negative Voltage
2 sequencing. POK1 remains low as
______________________________________________________________________________________
Low-Power Dual-/Triple-Voltage SC70 µP
CC
CC
RSTIN/PFI
2 power supply (use an external
, R1, and R2.
V
V
CC
CC
2
1
TH
RP
1 threshold. When V
). The POK1 output can
CC
CC
1 POK (POK1) ideal
1/V
CC
0.488V
2 thresholds.
POKP
V
CC
), the
1
CC
1.23V
1
The MAX6736–MAX6745 supervisors are relatively
immune to short-duration falling V
es). It is usually undesirable to reset the µP when V
experiences only small glitches. The Typical Operating
Characteristics show Maximum V
Duration vs. Reset Threshold Overdrive, for which reset
pulses are not generated. The graph shows the maxi-
mum pulse width that a falling V
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases, the maxi-
mum allowable pulse width decreases. A 0.1µF bypass
capacitor mounted close to the V
tional transient immunity.
TRANSISTOR COUNT: 249
PROCESS: BiCMOS
TIMEOUT
PERIOD
RESET
DELAY
Supervisory Circuits
MR
MAX6736–
MAX6745
V
CC
1
V
PULLUP
CC
MR
OUTPUT
1
RESET
V
CC
2
Functional Diagram
Chip Information
PFO
RESET
POK1
Transient Immunity
CC
CC
CC
CC
transient might typi-
pin provides addi-
1/V
transients (glitch-
CC
2 Transient
CC
13

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