MAX6459UTC-T Maxim Integrated, MAX6459UTC-T Datasheet - Page 9

• Manufacturer Part Number: MAX6459UTC-T
• Description: Supervisory Circuits
• Manufacturer: Maxim Integrated
• Series: MAX6457, MAX6458, MAX6459, MAX6460r

Specifications of MAX6459UTC-T

• Number Of Voltages Monitored: 2
• Monitored Voltage: 4 V to 28 V
• Undervoltage Threshold: 1.071 V
• Overvoltage Threshold: 1.151 V
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Supply Voltage - Max: 28 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Maximum Power Dissipation: 696 mW
• Minimum Operating Temperature: - 40 C
• Supply Current (typ): 6.5 uA
• Supply Voltage - Min: 4 V

Figure 7. Timing Diagram (MAX6457)
Hysteresis adds noise immunity to the voltage monitors
and prevents oscillation due to repeated triggering
when V
sis in a comparator creates two trip points: one for the
rising input voltage (V
voltage (V
The internal hysteresis options of the MAX6457/
MAX6458/MAX6459 are designed to eliminate the need
for adding an external hysteresis circuit.
The timeout period (t
from when the input (IN+) crosses the rising input
threshold (V
Figures 6 and 7). For the MAX6458, the monitored volt-
age must be in the “window” before the timeout starts.
The MAX6459 and MAX6460 do not offer the extended
timeout option (150ms). The extended timeout period is
suitable for overvoltage protection applications requir-
ing transient immunity to avoid false output assertion
due to noise spikes.
The MAX6457 features a digital latch input (CLEAR) to
latch any overvoltage event. If the voltage on IN+ (V
is below the internal threshold (V
Maxim Integrated
CLEAR
OUT
High-Voltage, Low-Current Voltage Monitors in
IN+
IN
>V
<V
V
V
is near the threshold trip voltage. The hystere-
TH+
TH
TH-
CC
CC
0
0
-). These thresholds are shown in Figure 6.
TH
+) to when the output goes high (see
Latched-Output Operation
TH
TP
) for the MAX6457 is the time
+) and one for the falling input
t
TP
TH
-), or if V
Timeout Period
Hysteresis
CC
is below
IN
+)
4V, OUT remains low regardless of the state of CLEAR.
Drive CLEAR high to latch OUT high when V
V
V
OUT. Drive CLEAR low to make the latch transparent
(Figure 7). CLEAR must be low when powering up the
MAX6457. To initiate self-clear at power-up, add a 100kΩ
pullup resistor from CLEAR to V
from CLEAR to GND to hold CLEAR low. Connect
CLEAR to GND when not used. See Figure 9.
Figure 8. Undervoltage Lockout Typical Application Circuit
TH
IN
+ drops back below V
+. When CLEAR is high, OUT does not deassert if
CHARGER
BATTERY
BATTERY
MAX6457–MAX6460
5-CELL
STACK
Li+
t
TP
+21V
R1
R2
SOT Packages
IN+
GND
IN
MAX6457–
MAX6460
-. Toggle CLEAR to deassert
V
CC
(OUTA FOR
MAX6459)
CC
OUT
and a 1µF capacitor
IN
R
PULLUP
t
TP
CONVERTER
IN
DC-DC
+ exceeds
SHDN
LOAD
OUT
9