MAX820TCPE Maxim Integrated, MAX820TCPE Datasheet - Page 13

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MAX820TCPE

Manufacturer Part Number
MAX820TCPE
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX792, MAX792L, MAX792M, MAX792R, MAX792S, MAX792T, MAX820, MAX820L, MAX820M, MAX820R, MAX820S, MAX820Tr
Datasheet

Specifications of MAX820TCPE

Number Of Voltages Monitored
1
Monitored Voltage
2.75 V to 5.5 V
Undervoltage Threshold
3 V
Overvoltage Threshold
3.15 V
Output Type
Active High, Active Low, Push-Pull
Manual Reset
Resettable
Watchdog
Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
280 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP N
Chip Enable Signals
Yes
Maximum Power Dissipation
842 mW
Minimum Operating Temperature
0 C
Power Fail Detection
Yes
Supply Current (typ)
150 uA
Supply Voltage - Min
2.75 V
The MAX792/MAX820 provide internal gating of chip-
enable (CE) signals, which prevents erroneous data
from corrupting CMOS RAM in the event of an under-
voltage condition. The MAX792/MAX820 use a series
transmission gate from CE IN to CE OUT (Figure 1).
During normal operation (reset not asserted), the CE
transmission gate is enabled and passes all CE transi-
tions. When reset is asserted, this path becomes dis-
abled, preventing erroneous data from corrupting the
CMOS RAM. The 10ns max CE propagation delay from
CE IN to CE OUT enables the MAX792/MAX820 to be
used with most µPs. If CE IN is low when reset asserts,
CE OUT remains low for a short period to permit com-
pletion of the current write cycle.
The CE transmission gate is disabled and CE IN is high
impedance (disabled mode) while reset is asserted.
During a power-down sequence when V
reset threshold, the CE transmission gate disables and
CE IN immediately becomes high impedance if the volt-
age at CE IN is high. If CE IN is low when reset is assert-
ed, the CE transmission gate will disable at the moment
CE IN goes high or 15µs after reset is asserted,
whichever occurs first (Figure 9). This permits the cur-
rent write cycle to complete during power-down.
During a power-up sequence, the CE transmission gate
remains disabled and CE IN remains high impedance
regardless of CE IN activity, until reset is deasserted fol-
lowing the reset timeout period.
While disabled, CE IN is high impedance. When the CE
transmission gate is enabled, the impedance of CE IN
will appear as a 75Ω (V
the load at CE OUT.
The propagation delay through the CE transmission
gate depends on V
drive connected to CE IN, and the loading on CE OUT
(see the Chip-Enable Propagation Delay vs. CE OUT
Load Capacitance graph in the Typical Operating
Characteristics). The CE propagation delay is produc-
tion tested from the 50% point on CE IN to the 50%
point on CE OUT using a 50Ω driver and 50pF of load
capacitance (Figure 10). For minimum propagation
delay, minimize the capacitive load at CE OUT, and use
a low-output-impedance driver.
______________________________________________________________________________________
CC,
Chip-Enable Signal Gating
CC
the source impedance of the
= 5V) resistor in series with
Chip-Enable Input
Microprocessor and Nonvolatile
CC
passes the
Memory Supervisory Circuits
When the CE transmission gate is enabled, the imped-
ance of CE OUT is equivalent to 75Ω in series with the
source driving CE IN. In the disabled mode, the 75Ω
transmission gate is off and an active pull-up connects
from CE OUT to V
transmission gate is enabled.
Connect a 0.1µF ceramic capacitor from V
as close to the device pins as possible. This reduces
the probability of resets due to high-frequency power-
supply transients. In a high-noise environment, addi-
tional bypass capacitance from V
required. If long leads connect to the chip inputs,
ensure that these lines are free from ringing, etc., which
would forward bias the chip’s protection diodes.
Figure 9. Reset and Chip-Enable Timing
Figure 10. CE Propagation Delay Test Circuit
THRESHOLD
CE OUT
RESET
RESET
RESET
CE IN
50Ω DRIVER
V
CC
Applications Information
CC
14
. This source turns off when the
CE IN
MAX792
MAX820
GND
+5V
V
CC
3
12
CE OUT
15µs
70µs
CC
Chip-Enable Output
13
to ground may be
C
LOAD
CC
70µs
to GND,
13

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